The Award database is continually updated throughout the year. As a result, data for FY19 is not expected to be complete until June, 2020.
SBC: ATC-NY, Inc. Topic: DTRA172003
Next-generation high-performance computing (HPC) hardware, such as the Intel Xeon Phi Knights Landing Many-Integrated-Core processor, provide new deep memory architectures that offer the promise of increased performance. The challenge in taking full advantage of this architecture is selecting which data structures will be placed in the high-bandwidth memory. Optimizing data structure placement in ...SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
SBC: CREARE LLC Topic: DTRA172001
Infrasound and seismic measurements are used by DTRA and the DoD for nuclear test monitoring, terrorist blast forensics, battle damage assessment, and environmental monitoring. However, these long wavelength physical signals are typically recorded through single-point sensors or sparse low density arrays. As a result, the critical signals of interest are often corrupted or masked by noise or inter ...SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
A Robust, Machine Independent, Software Toolkit for Topology Aware Process Mapping on Distributed Memory HPC ArchitecturesSBC: Continuum Dynamics Inc Topic: DTRA172002
A significant performance gap exists between the theoretical number of Floating Point Operations (FLOPS) that a HPC machine is capable of sustaining and the number of FLOPS realized by real-world HPC applications. One of the principle reasons for this gap is the parasitic work that computational processes must do to communicate with one another. It has been shown that this communication work can b ...SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency