You are here

Award Data

For best search results, use the search terms first and then apply the filters
Reset

The Award database is continually updated throughout the year. As a result, data for FY20 is not expected to be complete until September, 2021.

  1. Lithography Cost Reduction for Rad Hard Integrated Circuits

    SBC: SILICON TECHNOLOGIES, INC.            Topic: DTRA143008

    The DoD faces mounting costs for integrated circuits built with advanced technology. Our proposal addresses mixed-signal ASIC design costs and fabrication costs, notably photomask costs and photolithography costs. The ADONIS 1D design methodology has been demonstrated at technologies ranging from 130nm to 16nm. In Phase I of the program, we used ADONIS to design a reference circuit a high-speed c ...

    SBIR Phase II 2017 Department of DefenseDefense Threat Reduction Agency
US Flag An Official Website of the United States Government