Award Data

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The Award database is continually updated throughout the year. As a result, data for FY19 is not expected to be complete until June, 2020.

  1. Memory Instrumentation and Performance Simulation (MIPS)

    SBC: ATC-NY, Inc.            Topic: DTRA172003

    Next-generation high-performance computing (HPC) hardware, such as the Intel Xeon Phi Knights Landing Many-Integrated-Core processor, provide new deep memory architectures that offer the promise of increased performance. The challenge in taking full advantage of this architecture is selecting which data structures will be placed in the high-bandwidth memory. Optimizing data structure placement in ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  2. Low-Cost Sensing Array for Infrasound

    SBC: CREARE LLC            Topic: DTRA172001

    Infrasound and seismic measurements are used by DTRA and the DoD for nuclear test monitoring, terrorist blast forensics, battle damage assessment, and environmental monitoring. However, these long wavelength physical signals are typically recorded through single-point sensors or sparse low density arrays. As a result, the critical signals of interest are often corrupted or masked by noise or inter ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  3. Additive Manufacturing of All Solid-State Batteries with Novel Electrode Architectures

    SBC: Storagenergy Technologies, Inc.            Topic: DTRA172005

    Supercapacitors have attracted considerable recent attentions due to their high-power density, and long cycle life. Unfortunately, the energy density of supercapacitors is too low to meet these applications requiring an energy supply for longer periods (hours or days). Storagenergy Technologies Inc. proposes to develop a superior all solid-state battery (ASSB) fabricated by additive manufacturing ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  4. A Robust, Machine Independent, Software Toolkit for Topology Aware Process Mapping on Distributed Memory HPC Architectures

    SBC: Continuum Dynamics Inc            Topic: DTRA172002

    A significant performance gap exists between the theoretical number of Floating Point Operations (FLOPS) that a HPC machine is capable of sustaining and the number of FLOPS realized by real-world HPC applications. One of the principle reasons for this gap is the parasitic work that computational processes must do to communicate with one another. It has been shown that this communication work can b ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  5. A Generic Cross-Platform Perception API for Unmanned Vehicles

    SBC: Honeybee Robotics, Ltd.            Topic: OSD13HS4

    ABSTRACT: Autonomous vehicles lack a standardized mechanism for seamless cross-platform sharing of testing frameworks and evaluations of basic tasks. The ability to execute common tests on various hardware platforms is essential in order to be able to e

    SBIR Phase I 2014 Department of DefenseDefense Threat Reduction Agency
  6. Indirect Detection of Radiological and Nuclear Threats by Secondary Effects in Electromagnetic Materials

    SBC: PNTS INCORPORATED            Topic: DTRA133002

    ABSTRACT: The PNTS team has team has defined a schema using an active metamaterial exhibiting an externally driven electromagnetic response driven by the sensing of external radiation effects. The novel, groundbreaking concept, employs a semiconductor slab hosting BENEFITS: The team feels that its novel capabilities, with the potential for low cost for manufacturing and implementation, in the mos ...

    SBIR Phase I 2014 Department of DefenseDefense Threat Reduction Agency
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