Award Data

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The Award database is continually updated throughout the year. As a result, data for FY19 is not expected to be complete until June, 2020.

  1. Parameter Development for the Scaled Manufacturing of Mycelium Bound Panels for Commercial Interior Products

    SBC: Ecovative Design Llc            Topic: 16NCER6A

    Ecovative Design uses grown mycelium structures to bind agricultural and wood byproducts into inherently nontoxic_x000D_ products containing no added urea formaldehyde or flame-retardant chemicals. This research program focuses_x000D_ on maturing mycelium technology for use in the production of large scale board products, from low density (LD) particle board to acoustic panels and thermal insulati ...

    SBIR Phase II 2018 Environmental Protection Agency
  2. An Enhanced Contact Plasma Reactor: A Competitive Remediation Technology for Per- and Perfluoroalkyl Substance (PFAS) Contaminated Water

    SBC: Dmax Plasma LLC            Topic: 17NCER1A

    Perfluoroalkyl substances (PFASs) have received considerable attention due to their toxicity, ubiquitous presence and recalcitrance. Manufacture and disposal of PFAS-containing products has resulted in PFAS contamination of numerous water supplies. Recent reports indicate the Air Force alone is expecting to spend > $2.25 billion for cleanup for PFAS-contaminated sites. Thus, there is a huge market ...

    SBIR Phase I 2018 Environmental Protection Agency
  3. Green Process for Plastic Chrome

    SBC: VERGASON TECHNOLOGY, INC.            Topic: 17NCER5B

    This green approach to manufacturing plastic with decorative chrome will eliminate health and environmental hazards from the chrome electroplating process. The US and global market for decorative chrome on plastic is 12 million m2/year and 84 million m2/year respectively, with 80% in automobile trim, 10% in appliances and 10% in sanitary fixtures. Without a viable commercial alternative, US provid ...

    SBIR Phase I 2018 Environmental Protection Agency
  4. Memory Instrumentation and Performance Simulation (MIPS)

    SBC: ATC-NY, Inc.            Topic: DTRA172003

    Next-generation high-performance computing (HPC) hardware, such as the Intel Xeon Phi Knights Landing Many-Integrated-Core processor, provide new deep memory architectures that offer the promise of increased performance. The challenge in taking full advantage of this architecture is selecting which data structures will be placed in the high-bandwidth memory. Optimizing data structure placement in ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  5. A Robust, Machine Independent, Software Toolkit for Topology Aware Process Mapping on Distributed Memory HPC Architectures

    SBC: Continuum Dynamics Inc            Topic: DTRA172002

    A significant performance gap exists between the theoretical number of Floating Point Operations (FLOPS) that a HPC machine is capable of sustaining and the number of FLOPS realized by real-world HPC applications. One of the principle reasons for this gap is the parasitic work that computational processes must do to communicate with one another. It has been shown that this communication work can b ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  6. Novel Methods to Measure Penetrator Dynamics in Multi-Layer Geometries

    SBC: Thornton Tomasetti, Inc.            Topic: DTRA07011

    In Phase I of this effort we analyzed the structural response of a BLU 109 during typical penetration events. Based on these finite element results, we proposed and demsonstrated a simple robust concept for a passive penetrator sensor that identifies the material being penetrated and also correlates strongly with its underground trajectory. Such a sensor would obviously provide valuable informatio ...

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
  7. The Characterization and Mitigation of Single Event Effects in Ultra-Deep Submicron (< 90nm) Microelectronics

    SBC: Orora Design Technologies, Inc.            Topic: DTRA07005

    Orora Design Technologies proposes to develop electronic design automation (EDA) tools employing minimally invasive circuit design-based methods to mitigate single event effects (SEEs) for next generation Ultra-DSM CMOS (

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
  8. Agent Defeat using a DWA Accelerator

    SBC: Brookhaven Technology Group, Inc.            Topic: DTRA08008

    A new type of compact induction accelerator currently under development at the Lawrence Livermore National Laboratory (LLNL) promises to increase the average accelerating gradient by at least an order of magnitude over that of existing induction machines. The machine is based on the use of high gradient vacuum insulators and advanced dielectric materials and switches. The system, called the Diel ...

    SBIR Phase I 2008 Department of DefenseDefense Threat Reduction Agency
  9. Engineering Models for Damage to Structural Components Subjected to Internal Blast Loading

    SBC: Thornton Tomasetti, Inc.            Topic: DTRA08006

    Predicting the response of building components to internal detonations is more complex than the corresponding task for external loads because of the more complex loading waveforms which include multiple reflections in the shock phase followed by a long duration pseudostatic loading that depends upon room venting. Add the possibility of additional impulsive loading from primary debris. We propose t ...

    SBIR Phase I 2008 Department of DefenseDefense Threat Reduction Agency
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