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Award Data

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The Award database is continually updated throughout the year. As a result, data for FY24 is not expected to be complete until March, 2025.

Download all SBIR.gov award data either with award abstracts (290MB) or without award abstracts (65MB). A data dictionary and additional information is located on the Data Resource Page. Files are refreshed monthly.

The SBIR.gov award data files now contain the required fields to calculate award timeliness for individual awards or for an agency or branch. Additional information on calculating award timeliness is available on the Data Resource Page.

  1. Principled Security Analysis of the Firmware Binaries via Guaranteed Formal Verification and Scalable Dynamic Monitoring

    SBC: Sekurity LLC            Topic: HSB0181008

    Consequently, to protect the mobile/IoT platforms against complex security attacks, there is a need for effective analysis of mobile/IoT firmware. Such a solution is currently missing in the market. In this DHS SBIR effort, we will develop BINSEC, a mobile/IoT firmware binary security analysis framework. To ensure acceptable scalability, usability, and universality across different firmware binary ...

    SBIR Phase I 2018 Department of Homeland Security
  2. Improved Human Systems for Computed TomographySpeed of Image Review

    SBC: IDSS Holdings, Inc.            Topic: HSB0181006

    IDSS in partnership with Tufts University Human Factors Engineering Program, a leader in Engineering Phycology, proposes to study CT screening system operator burden and reduce image review time by reviewing the GUI and the current man-machine interaction, perform a cognitive and behavioral analysis of the interaction, perform a time an motion study and recommend and perform limited prototyping of ...

    SBIR Phase I 2018 Department of Homeland Security
  3. Firmware Automated Analysis at Scale with Testing

    SBC: RED BALLOON SECURITY, INC.            Topic: HSB0181008

    The firmware running on mobile, embedded, and Internet of things devices is often treated as a blackbox by organizations. These firmware images can contain a myriad of n-day vulnerabilities, both malicious and unintentional backdoors, and other unwanted functionality. Unfortunately, analyzing these firmware images is a difficult and time-consuming task as each firmware can be packed with layers of ...

    SBIR Phase I 2018 Department of Homeland Security
  4. Interference Detection and Analysis Device

    SBC: ANDRO COMPUTATIONAL SOLUTIONS LLC            Topic: HSB0181003

    Law enforcement and public safety agencies rely on the 700 MHz/800 MHz spectrum band which are affected by co-channel interference from the commercial radio networks along with unintentional as well as intentional radio frequency interferers (RFIs). The first responders need to be alerted or have prior knowledge of potential interferences at a mission site. This will enable them to adopt strategie ...

    SBIR Phase I 2018 Department of Homeland Security
  5. Memory Instrumentation and Performance Simulation (MIPS)

    SBC: ATC-NY INC            Topic: DTRA172003

    Next-generation high-performance computing (HPC) hardware, such as the Intel Xeon Phi Knights Landing Many-Integrated-Core processor, provide new deep memory architectures that offer the promise of increased performance. The challenge in taking full advantage of this architecture is selecting which data structures will be placed in the high-bandwidth memory. Optimizing data structure placement in ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  6. Low-Cost Sensing Array for Infrasound

    SBC: CREARE LLC            Topic: DTRA172001

    Infrasound and seismic measurements are used by DTRA and the DoD for nuclear test monitoring, terrorist blast forensics, battle damage assessment, and environmental monitoring. However, these long wavelength physical signals are typically recorded through single-point sensors or sparse low density arrays. As a result, the critical signals of interest are often corrupted or masked by noise or inter ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  7. A Robust, Machine Independent, Software Toolkit for Topology Aware Process Mapping on Distributed Memory HPC Architectures

    SBC: CONTINUUM DYNAMICS INC            Topic: DTRA172002

    A significant performance gap exists between the theoretical number of Floating Point Operations (FLOPS) that a HPC machine is capable of sustaining and the number of FLOPS realized by real-world HPC applications. One of the principle reasons for this gap is the parasitic work that computational processes must do to communicate with one another. It has been shown that this communication work can b ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  8. Standoff Detection of VBIED and Suicide Bomber

    SBC: Energy Research Company            Topic: HSB072001

    Energy Research Company proposes the continued development of its proprietary technology, Laser Induced Acoustics (LIA), for standoff detection of VBIEDs and suicide bombers, and building a LIA based prototype suitable for high fidelity simulations. LIA uses a laser to interrogate a surface with the resulting acoustic signal indicating the presence of any explosive residues. In addition, we are us ...

    SBIR Phase II 2008 Department of Homeland Security
  9. Novel Methods to Measure Penetrator Dynamics in Multi-Layer Geometries

    SBC: Thornton Tomasetti, Inc.            Topic: DTRA07011

    In Phase I of this effort we analyzed the structural response of a BLU 109 during typical penetration events. Based on these finite element results, we proposed and demsonstrated a simple robust concept for a passive penetrator sensor that identifies the material being penetrated and also correlates strongly with its underground trajectory. Such a sensor would obviously provide valuable informatio ...

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
  10. The Characterization and Mitigation of Single Event Effects in Ultra-Deep Submicron (< 90nm) Microelectronics

    SBC: Orora Design Technologies, Inc.            Topic: DTRA07005

    Orora Design Technologies proposes to develop electronic design automation (EDA) tools employing minimally invasive circuit design-based methods to mitigate single event effects (SEEs) for next generation Ultra-DSM CMOS (

    SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency
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