The Award database is continually updated throughout the year. As a result, data for FY19 is not expected to be complete until April, 2020.
A Robust, Machine Independent, Software Toolkit for Topology Aware Process Mapping on Distributed Memory HPC ArchitecturesSBC: Continuum Dynamics Inc Topic: DTRA172002
A significant performance gap exists between the theoretical number of Floating Point Operations (FLOPS) that a HPC machine is capable of sustaining and the number of FLOPS realized by real-world HPC applications. One of the principle reasons for this gap is the parasitic work that computational processes must do to communicate with one another. It has been shown that this communication work can b ...SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
The Characterization and Mitigation of Single Event Effects in Ultra-Deep Submicron (< 90nm) MicroelectronicsSBC: Orora Design Technologies, Inc. Topic: DTRA07005
Orora Design Technologies proposes to develop electronic design automation (EDA) tools employing minimally invasive circuit design-based methods to mitigate single event effects (SEEs) for next generation Ultra-DSM CMOS (SBIR Phase II 2008 Department of DefenseDefense Threat Reduction Agency