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The Award database is continually updated throughout the year. As a result, data for the given year is not complete until April of the following year. Annual Reports data is a snapshot of agency reported information for that year and hence might look different from the live data in the Awards Information charts.

  1. Memory Instrumentation and Performance Simulation (MIPS)

    SBC: ATC-NY, Inc.            Topic: DTRA172003

    Next-generation high-performance computing (HPC) hardware, such as the Intel Xeon Phi Knights Landing Many-Integrated-Core processor, provide new deep memory architectures that offer the promise of increased performance. The challenge in taking full advantage of this architecture is selecting which data structures will be placed in the high-bandwidth memory. Optimizing data structure placement in ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  2. Tools for Memory Hierarchy Optimization on Pre-Exascale HPC Architectures

    SBC: Ep Analytics, Inc            Topic: DTRA172003

    DTRA uses High Fidelity Computer Codes (HFCC) to investigate weapon effects and techniques for countering Weapons of Mass Destruction (WMD). End-to-end HFCC simulations in support of the DTRA Agent Defeat Warfighter Capability will require calculations including multiple phenomena that occur in vastly different time scales (-sec to hours). As DTRA becomes increasingly reliant on computational mode ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  3. Hardware-in-the-Loop Scintillation Simulator for MILSATCOM links in a Nuclear Disturbed Communication Environment

    SBC: WELKIN SCIENCES, LLC            Topic: DTRA172006

    In response to SBIR Topic DTRA172-006, Welkin Sciences proposes to design and build a new all-digital fading channel simulator to be called CoLTSAD. This new simulator design will be the latest addition to our family of Configurable Link Test Sets (CoLTS). It will be capable of emulating the full range of MIL-STD-3053 scintillating channel conditions for all SATCOM frequency bands up to Ka-band. C ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  4. Hardware-in-the-Loop Scintillation Simulator for MILSATCOM links in a Nuclear Disturbed Communication Environment

    SBC: Echo Ridge, LLC            Topic: DTRA172006

    Echo Ridge proposes to deliver a Hardware-in-the-Loop RF environment emulator with high fidelity scintillation simulation within which propagation models will in real-time accurately simulate a nuclear-disturbed environment for testing MILSATCOM communications links. The emulator will accommodate the attachment of physical devices (MILSATCOM communications link equipment or simulators), and/or mod ...

    SBIR Phase I 2018 Department of DefenseDefense Threat Reduction Agency
  5. Low Voltage Radiation Hardened Optoelectronics for Optical Interconnects

    SBC: QuantTera            Topic: DTRA152001

    The Defense Threat Reduction Agency (DTRA) recognizes the need for low-power high-bandwidth radiation-hard optical interconnects to process more data more quickly and to replace electronic data.Our companys core development in optical communications with semiconductor materials is a unique fit for DTRAs low-power consumption high-bandwidth radiation-hard intra-chip communication components for sat ...

    SBIR Phase II 2018 Department of DefenseDefense Threat Reduction Agency
  6. Real-Time Frequency-Selective Fading Channel Realization Generator

    SBC: WELKIN SCIENCES, LLC            Topic: DTRA122020

    During Phase I and a first Phase II, Welkin Sciences developed the Channel Realization Generator (CReG) algorithm, an enhanced functional replacement for the ACIRF code intended to be embedded into software link simulations and HWIL fading channel simulators. The proposed second Phase II effort will refine the CReG documentation and its software and firmware implementations. Many in the strategic ...

    SBIR Phase II 2018 Department of DefenseDefense Threat Reduction Agency
  7. Innovative Mitigation of Radiation Effects in Advanced Technology Nodes

    SBC: Microelectronics Research Development Corporation            Topic: DTRA16A003

    Micro-RDC has developed portable radiation effects test structures that scale to new process nodes.These structures will enable the investigation of the effects of radiation on the new technology from the material processing level as well as the circuit level.Fabricating the chosen structures and the refinement of software to extract the model parameters will be completed in this effort.A suite of ...

    STTR Phase II 2018 Department of DefenseDefense Threat Reduction Agency
  8. Thickness Measurement Technology for Thin Films on Sapphire Substrate

    SBC: Advanced Cooling Technologies, Inc.            Topic: DMEA16B001

    Silicon-on-sapphire (SOS) integrated circuits have achieved popularity due to their high speed performance and low power consumption in radio frequency applications. An important aspect of the SOS fabrication process that must be verified to maximize yield is the thickness of the thin films deposited on the sapphire substrate. However, due to the transparent nature of sapphire, current optical met ...

    STTR Phase II 2018 Department of DefenseDefense Microelectronics Activity
  9. Compact Laser Drivers for Photoconductive Semicond

    SBC: SCIENTIFIC APPLICATIONS & RESEARCH ASSOCIATES, INC.            Topic: DTRA16A004

    For effective protection against radiated threats, it is important to understand not only the physics of the threats, but also to quantify the effects they have on mission-critical electrical systems. Radiated vulnerability and susceptibility testing requires delivery of high peak power and peak electric fields to distant targets. The most practical solution to simulate such environments on large ...

    STTR Phase II 2018 Department of DefenseDefense Threat Reduction Agency
  10. Hierarchical, Layout-Aware, Radiation Effects Tools Vertically Integrated into an EDA Design Flow for Rad-Hard by Design

    SBC: Reliable MicroSystems, LLC            Topic: DTRA16A003

    The goal of this workis to establish a radiation-aware capability in a commercial EDA design flow that will enable first-pass success in radiation resiliency for DoD ASIC designs in much the same way that existing EDA design suites ensure first pass functionality and performance success of complex ASICs destined for commercial applications.Such an integrated capability does not presently exist.The ...

    STTR Phase II 2018 Department of DefenseDefense Threat Reduction Agency

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