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The Award database is continually updated throughout the year. As a result, data for FY24 is not expected to be complete until March, 2025.

Download all SBIR.gov award data either with award abstracts (290MB) or without award abstracts (65MB). A data dictionary and additional information is located on the Data Resource Page. Files are refreshed monthly.

The SBIR.gov award data files now contain the required fields to calculate award timeliness for individual awards or for an agency or branch. Additional information on calculating award timeliness is available on the Data Resource Page.

  1. Radiation Fault Analysis for 45 Nanometer CMOS-SOI VLSI Circuits

    SBC: Lynguent, Inc.            Topic: DTRA092001

    State of the art Radiation Hardened by Design (RHBD) techniques must scale down in feature size for radiation effects in 45 nm processes, and also scale up in complexity to support radiation fault analysis of VLSI circuits. Recent access to commercial 45 nm CMOS Silicon-on-Insulator (SOI) technologies has increased the interest in this technology for rad-hard electronic applications due to the in ...

    SBIR Phase I 2010 Department of DefenseDefense Threat Reduction Agency
  2. High Efficiency, Large-Area, 1550 nm InGaAs Photodiodes

    SBC: VOXTEL, INC.            Topic: N/A

    A back-illuminated planar InGaAs photodiode tested to have 95% quantum effiiency (QE) at 1550 nm, area greater than 1 mm2, low capacitance (125 MHz) will be improved. Although the existing Phase I device exhibited bulk material dark current generation better than commercially available devices, the sidewall-generated dark current was found to dominate the noise equiva ...

    SBIR Phase II 2010 Department of CommerceNational Institute of Standards and Technology
  3. 300 mm High Density Temperature Probe Card for Wafer- Level Reliability Testing

    SBC: Celadon Systems Inc.            Topic: N/A

    Historical methods of reliability assessment are less and less effective as device sizes shrink. Already researchers are unable to package the many advanced devices because the act of cutting the wafer and the packaging operation pre-stresses or destroys the devices resulting in unreliable test results. Additionally the increasing cost of fabricating a wafer with advanced integrated circuit techno ...

    SBIR Phase I 2010 Department of CommerceNational Institute of Standards and Technology
  4. HIGH EFFICIENCY COMPACT MODELING OF RADIATION EFFECTS

    SBC: Lynguent, Inc.            Topic: DTRA05001

    The objective of this research is to develop beta versions of tools for automatically migrating radiation effects predicted in TCAD level tools to compact modeling tools. This transition will enable compact models that possess radiation effects to be quickly generated, which can then be used in circuit design activity. This approach is a substantial improvement over the current ad hoc approaches. ...

    SBIR Phase II 2006 Department of DefenseDefense Threat Reduction Agency
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