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The Award database is continually updated throughout the year. As a result, data for FY19 is not expected to be complete until April, 2020.

  1. Radiation Hard Electronics for Advanced Communication Systems

    SBC: ICS LLC            Topic: O102

    Advanced reconfigurable/reprogrammable communication systems will require use of commercial sub 100 nm electronics. Legacy radiation tolerant circuits fail to provide Single Event Upset (SEU) immunity at speeds greater than 500 MHz. New base level logic circuits are needed to provide SEU immunity for high speed circuits afforded by sub 100 nm technology. A completely new circuit and system appr ...

    SBIR Phase I 2011 National Aeronautics and Space Administration
  2. Self-Reconfigurable Memristor-Based Computing Architecture: Design, Fabrication, and Characterization

    SBC: Bio Inspired Technologies, LLC            Topic: AF10BT31

    ABSTRACT: The behavior of the Chalcogenide based ion-conducting memristor lends itself for use as an element in a simple neuromorphic computing circuit. The reaction of a circuit to an external stimulus may be the result of its ability to learn from previous similar, yet unrelated exposures to environmental stimulus. A highly specialized variation of the memristor, previously developed by the Ad ...

    STTR Phase I 2011 Department of DefenseAir Force
  3. High Performance, Ultra Low Power SPA-1 ASIC for Space Plug-and-Play Avionics

    SBC: American Semiconductor, Inc.            Topic: AF093082

    ABSTRACT: The Space Plug-and-play Avionics (SPA) initiative is designed to improve the ability of the US military to respond to rapidly changing operational needs by creating, integrating, and launching a new spacecraft in less than one week. This would provide major benefits to war fighters on the ground, in the sky, and at sea. SPA-1 ASICs using I2C as the transport interface will likely be t ...

    SBIR Phase II 2011 Department of DefenseAir Force
  4. PULSE TO DIGITAL CONVERSION SYSTEM

    SBC: Moscow Electronics Co            Topic: N/A

    THE COMPLETE DESIGN IS PRESENTED WITHIN THIS PROPOSAL FOR A SYSTEM WHICH WILL PROVIDE A PRECISE, ONE-STEP CONVERSION DIRECTLY FROM A PULSE TRAIN INPUT TO A DIGITIZED PULSE RATE OUTPUT. IT IS A DISTRIBUTED PROCESSOR SYSTEM EMPLOYING A MASTER CONTROL PROCESSOR AND FROM 2 TO 30 IDENTICAL PULSE MODULES. THE PULSE MODULE IS A STANDALONE UNIT WHICH PERFORMS THE PULSE PERIOD MEASUREMENT. THE MICROPROCESS ...

    SBIR Phase II 1990 Department of DefenseAir Force

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