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Award Data

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The Award database is continually updated throughout the year. As a result, data for FY24 is not expected to be complete until March, 2025.

Download all SBIR.gov award data either with award abstracts (290MB) or without award abstracts (65MB). A data dictionary and additional information is located on the Data Resource Page. Files are refreshed monthly.

The SBIR.gov award data files now contain the required fields to calculate award timeliness for individual awards or for an agency or branch. Additional information on calculating award timeliness is available on the Data Resource Page.

  1. Onboard Flight Digital Data Recorder for Measuring the Shock and Vibration Environment Associated with the Dispense and Flight of Missile Submunitions

    SBC: NVE CORP. (FORMERLY NONVOLATILE ELECTRONICS, INC.            Topic: AF99325

    ABSTRACT: The Air Force Flight Test Center (AFFTC) is interested in upgrading their test aircraft fleet (or a portion thereof) to have onboard smart sensors (OSS). The target SBIR product for this project is a set of hardware components that allows the integration of IEEE 1451.4 Smart Sensors into the Common Airborne Instrumentation System (CAIS) which is the most common data acquisition system c ...

    SBIR Phase II 2011 Department of DefenseAir Force
  2. Electrical power generation for sustained high speed flight

    SBC: Johnson Research & Development Co Inc            Topic: AF08BT25

    ABSTRACT: Providing electrical power for long duration hypersonic flight is a technology that is required to bring about this revolutionary mode of transport. Whether for weapons delivery or for space access, the long duration missions anticipated require a novel approach to the generation of electrical power during flight. Scramjets contain no rotating shafts from which typical generators or mec ...

    STTR Phase II 2011 Department of DefenseAir Force
  3. High Performance, Ultra Low Power SPA-1 ASIC for Space Plug-and-Play Avionics

    SBC: American Semiconductor, Inc.            Topic: AF093082

    ABSTRACT: The Space Plug-and-play Avionics (SPA) initiative is designed to improve the ability of the US military to respond to rapidly changing operational needs by creating, integrating, and launching a new spacecraft in less than one week. This would provide major benefits to war fighters on the ground, in the sky, and at sea. SPA-1 ASICs using I2C as the transport interface will likely be t ...

    SBIR Phase II 2011 Department of DefenseAir Force
  4. Injector Stability Screening Technique (ISST)

    SBC: Orbital Technologies Corporation            Topic: AF083112

    ABSTRACT: ORBITEC proposes to demonstrate and validate a laboratory-scale experimental injector stability screening technique which will quantify injector element stability characteristics. The experimental approach promises to dramatically reduce development cost by utilizing a gaseous single element test facility which presents savings in hardware manufacturing, consumables, and test facility l ...

    SBIR Phase II 2011 Department of DefenseAir Force
  5. Massively Parallel High Temperature Probe System for Wafer-level Reliability Testing

    SBC: Celadon Systems Inc.            Topic: 910021R

    Historical methods of reliability assessment are less and less effective as device sizes shrink. Larger sample sizes and longer duration tests are increasingly needed. At the same time, efforts to continue scaling semiconductors to ever smaller geometries is leading to an explosion of new device structures, materials and processes. The cost of testing these innovations is becoming a major barrier ...

    SBIR Phase II 2011 Department of CommerceNational Institute of Standards and Technology
  6. FAIL-SAFE FAULT-TOLERANT ELECTRONICS

    SBC: Daina            Topic: N/A

    FUTURE MILITARY AVIONICS SYSTEMS WILL REQUIRE AT LEAST AN ORDER OF MAGNITUDE IMPROVEMENT IN MEAN TIME BETWEEN CRITICAL FAILURES. TO ACHIEVE THIS GOAL INNOVATIVE FAIL-SAFE FAULT-TOLERANT ELECTRONIC SYSTEM DESIGN CONCEPTS WILL BE NEEDED. THE APPROACH PROPOSED BY DAINA WILL BE BASED ON THE USE OF EXTERNAL ENVIRONMENT DATA, BUILT-IN RELIABILITY MODEL, ADAPTIVE STATISTICAL SYSTEM STATE AND PARAMETER ES ...

    SBIR Phase II 1990 Department of DefenseAir Force
  7. PULSE TO DIGITAL CONVERSION SYSTEM

    SBC: Moscow Electronics Co            Topic: N/A

    THE COMPLETE DESIGN IS PRESENTED WITHIN THIS PROPOSAL FOR A SYSTEM WHICH WILL PROVIDE A PRECISE, ONE-STEP CONVERSION DIRECTLY FROM A PULSE TRAIN INPUT TO A DIGITIZED PULSE RATE OUTPUT. IT IS A DISTRIBUTED PROCESSOR SYSTEM EMPLOYING A MASTER CONTROL PROCESSOR AND FROM 2 TO 30 IDENTICAL PULSE MODULES. THE PULSE MODULE IS A STANDALONE UNIT WHICH PERFORMS THE PULSE PERIOD MEASUREMENT. THE MICROPROCESS ...

    SBIR Phase II 1990 Department of DefenseAir Force
  8. The Holographic Sidelobe Canceller: Holographic Radar Processing for Interference Mitigation

    SBC: PROPAGATION RESEARCH ASSOCIATES, INC            Topic: AF10BT29

    ABSTRACT: Propagation Research Associates, Inc., (PRA) and the Georgia Tech Research Institute (GTRI) are teamed to propose an innovative holographic receiver and processing technology for enhanced radar electronic protection. PRA/GTRI will investigate applying holographic processing to Synthetic Aperture Radar (SAR) and Electronically Scanned Arrays (ESAs) in order to mitigate interference such ...

    STTR Phase I 2011 Department of DefenseAir Force
  9. Self-Reconfigurable Memristor-Based Computing Architecture: Design, Fabrication, and Characterization

    SBC: Bio Inspired Technologies, LLC            Topic: AF10BT31

    ABSTRACT: The behavior of the Chalcogenide based ion-conducting memristor lends itself for use as an element in a simple neuromorphic computing circuit. The reaction of a circuit to an external stimulus may be the result of its ability to learn from previous similar, yet unrelated exposures to environmental stimulus. A highly specialized variation of the memristor, previously developed by the Ad ...

    STTR Phase I 2011 Department of DefenseAir Force
  10. Precise fabrication of photonic integrated systems using low cost nanoimprint process

    SBC: Sinoora Inc.            Topic: OSD10T006

    In this STTR proposal, we propose to develop a cost-effective and high-fidelity nanoimprint process for the fabrication of integrated photonics devices. VLSI photonics applications require a hig-level of control on device-to-device uniformity. Nanoimprint lithography (NIL) holds promise to overcome the current technological challenges in lithography while being cost effective at the same time. One ...

    STTR Phase I 2011 Department of DefenseAir Force
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