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The Award database is continually updated throughout the year. As a result, data for the given year is not complete until April of the following year. Annual Reports data is a snapshot of agency reported information for that year and hence might look different from the live data in the Awards Information charts.

  1. Analysis of Integrated Circuits Using Limited X-rays

    SBC: Tangent Sciences LLC            Topic: DMEA152002

    XRadIC establishes an automated software framework to non-destructively analyze cutting edge microelectronics using photon flux-limited x-ray microscope systems. XRadIC couples on-the-fly sample scanning with online optimized 2D and 3D image analysis algorithms to maximize overall system throughput by dynamically minimizing the number of viewing angles and exposure times needed to analyze a given ...

    SBIR Phase II 2018 Department of DefenseDefense Microelectronics Activity
  2. Broadband Quadrature Mixers with Integrated I/Q Mismatch Calibration

    SBC: CREONEX SYSTEMS INC.            Topic: DMEA102002

    Communication SoC technology has advanced significantly over the past ten years resulting in highly integrated radio SoC chips for standards such as Wi-Fi, global position system (GPS), Bluetooth (BT), 3G cellular, digital TV (DTV), and cable modems. While most radio SoC"s are narrowband (e.g. WiFi, GPS, BT, and cellular), future trends favor broadband software defined radios (SDR) and cognit ...

    SBIR Phase II 2013 Department of DefenseDefense Microelectronics Activity
  3. High Speed, High Resolution X-ray System for Inspecting Integrated Circuits

    SBC: SVXR            Topic: DMEA122001

    The company proposes to design, build and test a prototype system for high-speed x-ray inspection. The system will be based on a new method of x-ray imaging that allows for high-NA x-ray illumination using standard laboratory (non-synchrotron) x-ray sources. A high-resolution, large field-of-view detector permits large field-of-view, high-resolution imaging.

    SBIR Phase II 2014 Department of DefenseDefense Microelectronics Activity
  4. High-Efficiency Integrated Si APD Quantum Key Receiver

    SBC: Freedom Photonics LLC            Topic: DMEA142001


    SBIR Phase II 2017 Department of DefenseDefense Microelectronics Activity
  5. High-Throughput Experimentation Physical Vapor Deposition (PVD) Chamber for Accelerated Microelectronics Materials Research and Development

    SBC: INTERMOLECULAR, INC.            Topic: DMEA07001

    The cost to maintain Moore’s law is growing exponentially with every generation of semiconductor device. To support the ever-increasing demand for smaller, faster, lower-power, and lower-cost microelectronic semiconductor devices, tools enabling faster and lower-cost research and development are required. Current development tools are only capable of achieving one data point per wafer. The goal ...

    SBIR Phase II 2008 Department of DefenseDefense Microelectronics Activity
  6. In-Line Characterization System for Advanced High K Dielectric / Metal Gate CMOS Transistor Stack for the Development of High Speed, Low Power Microel

    SBC: INTERMOLECULAR, INC.            Topic: DMEA07002

    Throughout the history of integrated circuit fabrication, gate stack engineering has been employed to meet the aggressive device scaling necessary to stay on the Moore’s Law curve. However, as device dimensions continue to progress into the sub-100-nm regime, scaling of the traditional SiO2 gate dielectric led to issues with reliability, dopant penetration and excessive gate leakage current. Ove ...

    SBIR Phase II 2008 Department of DefenseDefense Microelectronics Activity
  7. Low-noise amplifier (LNA) and Power amplifier (PA) for Radio-Frequency (RF) System-onChip (SoC) Applications on Silicon on Sapphire (SOS) Substrates

    SBC: Tahoe RF Semiconductor Inc.,            Topic: DMEA092002

    Tahoe RF will design, simulate, fabricate and test a low noise amplifier (LNA) and companion power amplifier (PA). The feasibility study for this design was completed during the Phase I activities. The design will be fabricated using a noise improved device models of a 0.25 m silicon-on-sapphire (SOS) process.

    SBIR Phase II 2011 Department of DefenseDefense Microelectronics Activity
  8. Nano-Resolution Three-Dimensional Integrated Circuit ReconstructionSystem


    To address the DMEA need for accurate identification and analysis of semiconductor materials with high-resolution imaging of integratedcircuits (ICs), Physical Optics Corporation (POC) developed and evaluated the feasibility of novel Nano-Resolution Three-DimensionalIntegrated Circuit Reconstruction (NEOTERIC) System for in situ full reverse engineering of ICs based on swing nanolaminography and a ...

    SBIR Phase II 2016 Department of DefenseDefense Microelectronics Activity
  9. Rapid Non-destructive Detection of Advanced Counterfeit Electronic Material

    SBC: NOKOMIS, INC            Topic: DMEA152001

    Counterfeit and maliciously modified electronics can disrupt, disable, and subvert Department of Defense (DoD) weapons systems crucial to national security. When coupled with the growing sophistication of counterfeits and physical malware, the need for advanced detection technology is apparent. Conventional screening technologies have proven incapable of robust and reliable counterfeit ...

    SBIR Phase II 2017 Department of DefenseDefense Microelectronics Activity
  10. Thickness Measurement Technology for Thin Films on Sapphire Substrate

    SBC: Advanced Cooling Technologies, Inc.            Topic: DMEA16B001

    Silicon-on-sapphire (SOS) integrated circuits have achieved popularity due to their high speed performance and low power consumption in radio frequency applications. An important aspect of the SOS fabrication process that must be verified to maximize yield is the thickness of the thin films deposited on the sapphire substrate. However, due to the transparent nature of sapphire, current optical met ...

    STTR Phase II 2018 Department of DefenseDefense Microelectronics Activity

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