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The Award database is continually updated throughout the year. As a result, data for FY20 is not expected to be complete until September, 2021.

  1. DEVELOPMENT OF A RESIDUAL IN-SITU STRESS GAUGE

    SBC: Terra Tek Inc.            Topic: N/A

    QUANTITATIVE VERIFICATION OF THE RESIDUAL IN-SITU STRESS FIELD WHICH CREATES THE CONTAINMENT CAGE IS NEEDED TO ASSESS THE FACTOR OF SAFETY AGAINST HYDRAULIC FRACTURING FROM THE CAVITY WALL. PHASE I WILL ESTABLISH THE FEASIBLITY OF DEVELOPING A PASSIVE STRESS GAUGE, ABSENT OF ACTIVE INSTRUMENTATION, AND CAPABLE OF RECORDING THE RESIDUAL IN-SITU STRESS FIELD IMMEDIATELY FOLLOWING THE NUCLEAR DEVICE ...

    SBIR Phase II 1991 Department of DefenseDefense Threat Reduction Agency
  2. ELIMINATION OF TURBULENCE-INDUCED STRUCTURAL FAILURE AND CONTROL LOSS IN VERY LIGHT AIRCRAFT

    SBC: Daedalus Research Inc.            Topic: N/A

    A SYSTEM UTILIZING THE FREE-WING CONCEPT HAS BEEN DESIGNED FOR LIGHT AND VERY LIGHT WING-LOADING AIRCRAFT THAT ACCOMMODATES MODERATE TO HEAVY TURBULENCE WITHOUT TRANSMITTING HIGH GUST LOADINGS TO THE AIRFRAME OR THREATENING LOSS OF CONTROL. THE PROJECT WILL TEST THE SYSTEM IN A RESEARCH VEHICLE APPROXIMATING THE DESIGN CRITERIA SET FORTH IN 14 CFR, PART 103; THE RESEARCH VEHICLE IS UNMANNED.

    SBIR Phase II 1985 Department of Transportation
  3. Lithography Cost Reduction for Rad Hard Integrated Circuits

    SBC: SILICON TECHNOLOGIES, INC.            Topic: DTRA143008

    The DoD faces mounting costs for integrated circuits built with advanced technology. Our proposal addresses mixed-signal ASIC design costs and fabrication costs, notably photomask costs and photolithography costs. The ADONIS 1D design methodology has been demonstrated at technologies ranging from 130nm to 16nm. In Phase I of the program, we used ADONIS to design a reference circuit a high-speed c ...

    SBIR Phase II 2017 Department of DefenseDefense Threat Reduction Agency
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