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Award Data
The Award database is continually updated throughout the year. As a result, data for FY20 is not expected to be complete until September, 2021.
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Lithography Cost Reduction for Rad Hard Integrated Circuits
SBC: SILICON TECHNOLOGIES, INC. Topic: DTRA143008The DoD faces mounting costs for integrated circuits built with advanced technology. Our proposal addresses mixed-signal ASIC design costs and fabrication costs, notably photomask costs and photolithography costs. The ADONIS 1D design methodology has been demonstrated at technologies ranging from 130nm to 16nm. In Phase I of the program, we used ADONIS to design a reference circuit a high-speed c ...
SBIR Phase II 2017 Department of DefenseDefense Threat Reduction Agency