Award Data

This Phase 1 SBIR project will establish the technical and commercial benefits of using previous task executions to augment model-based route planning for military applications. On this project, we will integrate a prototype route planner using ``Implicit Semantic Knowledge'' (ISK) derived from previous executions, with an existing model-based route planner, called ``Ground Guidance.'' Model-bas ...

ATEI’s unique partnership with the University of Minnesota plans to exploits applied and fundamental research, respectively, to achieve unprecedented levels of integration for highly complex RF microwave, mm-wave and analog/digital/mixed-signal modules using Silicon Complementary Metal Oxide Semiconductor (CMOS) technology to support emerging DoD-critical applications such as wafer-scale phase a ...

This program proposes to demonstrate an ultra-low power design methodology and circuits for digital logic employing advanced dynamic voltage scaling (DVS) for asynchronous NULL Convention Logic (NCL) circuits operating in sub-threshold to super-threshold voltage regimes. The power supply voltages of logic block partitions will be independently set by on-chip voltage controllers based on the data p ...

SIFT proposes the PARCEL technology to establish a knowledge economy for solving hard problems that require thousands of participants. PARCEL rewards participants with a combination of altruism, recognition, competition and monetary rewards. PARCEL provides a collaboration environment that integrates many existing open source and social networking tools to ensure efficient use of participant's ...

On-board autonomy for satellite defense poses significant challenges to today’s planning and execution technology, including mission-critical performance, hard real-time deadlines, and limited computational resources. To meet these challenges, SIFT proposes to build SAT-CIRCA: an integrated, verifiable architecture for real-time satellite response planning and execution. In previous research, we ...