Radiation-Hardened Memory - 90nm 64Mb SRAM
Small Business Information
Silicon Space Technology Corporation
804 Las Cimas Parkway, Suite 140, Austin, TX, 78746
AbstractSilicon Space Technology along with its partner Texas Instruments proposes to develop, fabricate and test the world's first radiation hardened 64Mb Quad Data Rate SRAM for space applications by applying SST's proprietary hardened-by-isolation (HBI) techniques to TI's 90nm C027 process. The 64Mb QDR SRAM will be designed using TI's existing 90nm design rules and manufactured in TI's 90nm capable process fabs. SST's HBI modules have solved the major space radiation problems, Single-Event Effects (SEE), Total Ionizing Dose (TID), and Dose Rate (DR). The Phase I study has shown that these techniques can be successfully implemented at the 90nm technology node. This project will result in a radiation hardened memory with true 90nm geometries, and circuit performance built onshore in TI's Texas 300mm fabrication facility. The memory proposed by SST is a RH 72Mb (64Mb + ECC bits) QDR SRAM which will include EDAC and scrub capability. The HBI techniques have been proven to exceed RH requirements of most MDA programs through fabrication and testing of a 16Mb RH SRAM at 180nm. The 64Mb RH SRAM will be the only available memory that complies with Virtex 4 & 5 SRAM interface requirements.
* information listed above is at the time of submission.