HIGH SPEED GALIUM ARSENIDE DESIGN TOOL

Award Information
Agency:
National Science Foundation
Branch:
N/A
Amount:
$40,000.00
Award Year:
1987
Program:
SBIR
Phase:
Phase I
Contract:
N/A
Agency Tracking Number:
7633
Solicitation Year:
N/A
Solicitation Topic Code:
N/A
Solicitation Number:
N/A
Small Business Information
Bonneville Scientific, Inc
918 East 900 South, Salt Lake City, UT, 84105
Hubzone Owned:
N
Socially and Economically Disadvantaged:
N
Woman Owned:
N
Duns:
N/A
Principal Investigator
 ALLEN R. GRAHN
 (801) 359-0402
Business Contact
Phone: () -
Research Institution
N/A
Abstract
INTEREST IN GALIUM ARSENIDE (GAAS) INTEGRATED CIRCUITS (IC) GROWING RAPIDLY BECAUSE THEY ARE VERY FASTAND RESISTANT TO RADIATION. HOWEVER, SOME SIGNIFICANT PROBLEMS ARE STILL OF CONCERN. FIRST, THE INCREASED SPEED OF THIS TECHNOLOGY HAS LEAD TO TIMING PROBLEMS IN CIRCUIT DESIGN. WITH THIS TECH- NOLOGY THE GATE SWITCHING SPEEDS HAVE BEEN INCREASED TO WHERE THEY CAN BE EQUIVALENT TO THE WIRE TRANSMISSION TIMES.SECOND, GAAS FABRICATION PROCESSES ARE NOT AS EFFICENT AS WITH SILICON AND YIELDS ARE TYPICALLY POOR. THIRD, FAST, HIGH-LEVEL DESIGN TOOLS ARE NOT AVAILBABLE. THIS PROPOSAL ADDRESSES AN APPROACH TO PROVIDE A VERY FAST DESIGN TOOL BASED UPON PATH PROGRAMMABLE LOGIC FOR GAAS CIRCUITS WHICH WILL RESULT IN CIRCUITS WITH MINIMAL AND WELL CONTROLLED WIRE LENGTHS. THE DESIGN METHOD PROVIDES IMMEDIATE CIRCUIT FUNCTION VERIFICATION FOR TIMING PROBLEM CONTROL. IT ALSO RESULTS IN VERY COMPACT CIRCUIT LAYOUT WHICH IS EQUIVALENT TO FULL CUSTOM DESIGNS WITH THE REQUIRED DESIGN TIME BEING DECREASED BY AN ORDER OF MAGNITUDE. THE MORE COMPACT LAY- OUT WILL RESULT IN BETTER CIRCUIT PERFORMANCE AND IMPROVED

* information listed above is at the time of submission.

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