Development for Radiation Hardened Advanced Electronic Circuits

Award Information
Agency: Department of Defense
Branch: Missile Defense Agency
Contract: HQ0006-10-C-7403
Agency Tracking Number: B09B-006-0053
Amount: $99,980.00
Phase: Phase I
Program: STTR
Awards Year: 2010
Solicitation Year: 2009
Solicitation Topic Code: MDA09-T006
Solicitation Number: 2009.B
Small Business Information
New Brunswick Technology Center, 100 Jersey Ave.Building A, New Brunswick, NJ, 08901
DUNS: 042068101
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Larry Li
 Sr. Engineer
 (732) 565-9500
Business Contact
 Maurice Weiner
Title: Vice President
Phone: (732) 565-9500
Research Institution
 Rutgers University
 Charles Wyckoff
 3 Rutgers Plaza
New Brunswick, NJ, 8901
 (732) 932-0115
 Nonprofit college or university
In response to SBIR topic MDA09-T006, USCI proposes to develop the first medium-level integrated circuit for radiation-tolerant applications. The advanced integrated circuit will be demonstrated based on a novel yet simple design SiC transistor that has the potential to provide a factor of 10X improvement in performance comparison to state-of-the-art. The SiC transistor can be fabricated by a substantially simplified processing technology that has been developed in-house. Phase I will be focused on the radiation-tolerant design of all critical device components, all subcircuit blocks and the final complete integration of the circuit. A large number of design paramters will be studied and optimized including the transistor radiation tolerance, switching speed, conduction loss, blocking voltage, overall efficiency and temperature dependence. Phase II will be focused on (i) the fabrication of multiple batches of the critical device components, subcircuit blocks and the completely integrated circuits, (ii) the electrical and thermal characterization of all components, subcircuit blocks and the entire IC, and (iii) the evaluation of radiation tolerance of the key device components, subcircuit blocks and the complete ICs. Phase III will be focused on improving manufacturing yield and packaging of the IC for prototype system demonstration.

* Information listed above is at the time of submission. *

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