Rapid Radiation Hardened Prototyping of Obsolescent Military Satellite Microelectronics
Department of Defense
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Small Business Information
Advanced Science and Novel Technology
27 Via Porto Grande, Rancho Palos Verdes, CA, 90275
Socially and Economically Disadvantaged:
AbstractInnovative methodologies for rapid design, fabrication, characterization, and qualification of radiation hardened (RH) space microelectronics are required to minimize disruption of satellite programs by obsolete parts. The replacement parts must be pin-to-pin and functionally compatible with the obsolete components. Full-custom components satisfy those requirements, but must be individually qualified which drastically increases cost, development time, and requires experienced engineering resources. To address the outlined requirements, we propose to develop a novel methodology for rapid replacement of obsolete components based on a pre-qualified RH library that includes 1.8V CMOS standard logic cells and functional blocks, as well as unique self-adaptable high-voltage IOs and efficient signal voltage level converters. All components utilize proprietary annular field-effect transistors designed in a commercial technology. This combination provides a universal interface to CMOS circuits with supply voltages from 1.8V to 5V while supporting data rates up to 1Gb/s within the temperature range of -40ºC to +125ºC and delivering a complete elimination of latch-up conditions and TID tolerance in excess of 2MRad. A possibility of the metal-programmable gate array design approach based on the proposed library will be investigated. A test circuit of medium complexity will be synthesized to demonstrate the advantages of the proposed methodology. BENEFIT: A fully qualified RH library operating at the wide temperature range with self-adaptable high-voltage IOs proved in fabrication of test chips will allow for a rapid replacement of obsolete components in space-oriented and ground-based electronic equipment. The design period of replacement parts can be reduced to several weeks and even days depending on the required chip complexity, while the time-consuming qualification procedures will be also replaced by simple functionality tests. The gate array design approach may further speed-up the development process due to the utilization of pre-fabricated front-end-of-line structures. The developed techniques will also significantly speed-up the development of new components for both military and commercial space applications.
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