Advanced Physical Design Tools for 3-Dimensional Integrated Circuits

Award Information
Agency: Department of Defense
Branch: Defense Advanced Research Projects Agency
Contract: DAAH0103CR193
Agency Tracking Number: 02SB1-0262
Amount: $374,997.00
Phase: Phase II
Program: SBIR
Solicitation Topic Code: N/A
Solicitation Number: N/A
Timeline
Solicitation Year: N/A
Award Year: 2003
Award Start Date (Proposal Award Date): N/A
Award End Date (Contract End Date): N/A
Small Business Information
215 Wynn Drive, Huntsville, AL, 35805
DUNS: 185169620
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Marek Turowski
 Manager Microelectronics
 (256) 726-4800
 mt@cfdrc.com
Business Contact
 Ashok Singhal
Title: President & Technical Dir
Phone: (256) 726-4800
Email: aks@cfdrc.com
Research Institution
N/A
Abstract
Three-dimensional (3-D) integrated circuits (ICs) can significantly improve circuit performance and offer the promise of integrating various technologies (memory, logic, RF, mixed-signal, optoelectronics)within a single block. Lack of 3-D design tools andheat dissipation froThree-dimensional (3-D) integrated circuits (ICs) can significantly improve circuit performance and offer the promise of integrating various technologies (memory, logic, RF, mixed-signal, optoelectronics) within a single block. Lack of3-D design tools and heat dissipation from vertically stacked multiple layers are the crucial problems in their development. To address these issues, CFD Research Corporation (CFDRC), together with UCLA and Irvine Sensors, propose to: 1) Developmethodologies to analyze and assess coupled electrical and thermal performance of 3-D ICs, including calculation of realistic full-chip thermal distributions and determining from them signal delay/distortion. 2) Develop a novel performance-driven andthermal-driven 3-D IC physical design system, which is capable of automatic 3-D IC placement and routing. It will consider key factors in 3-D IC layout, including thermal, performance, congestion, and power control and optimization. 3) Interface the new3-D design tools with commercial EDA environments in order to validate and demonstrate the methodology.

* Information listed above is at the time of submission. *

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