AN EXTENDABLE MICROPROCESSOR-BASED DATA COLLECTION/ANALYSISS

Award Information
Agency: Department of Health and Human Services
Branch: N/A
Contract: N/A
Agency Tracking Number: 3312
Amount: $401,314.00
Phase: Phase II
Program: SBIR
Awards Year: 1987
Solicitation Year: N/A
Solicitation Topic Code: N/A
Solicitation Number: N/A
Small Business Information
21 Erie St ^ Suite 24, Cambridge, MA, 02139
DUNS: N/A
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Richard J. Potash
 Principal Investigator
 (617) 964-1781
Business Contact
Phone: () -
Research Institution
N/A
Abstract
NEUROSCIENCE RESEARCH REQUIRES THE ACCUMULATION OF LARGE AMOUNTS OF RAW DATA. IT IS DESIRABLE TO PROCESS THE DATA IN REAL-TIME, ALLOWING FOR DECISIONS TO BE MADE DURING THE COURSE OF AN EXPERIMENT. UNFORTUNATELY, THE AMOUNT OF REAL-TIME PROCESSING IS OFTEN LIMITED BY THE POWER OF A SINGLE PROCESSOR. WE PROPOSE THE DEVELOPMENT OF AN EXTENDABLE MICROPROCESSOR-BASED DATA COLLECTION/ANALYSIS MODULE WHICH WILL ALLOW THE MODULE WILL CONTAIN A 16-BIT PROCESSOR, MULTICHANNEL A/D CONVERTER, 16-BIT D/A CONVERTER, SERIAL PORT, RAM, AND ROM. THE MODEL COMMUNICATES WITH A HOST THROUGH THE SERIAL PORT. THE RESEARCHER CAN DOWNLOAD PROGRAMS FROM THE HOST FOR EXECUTION ON THE MODULE. RESULTS ARE SENT TO THE HOST FOR STORAGE AND DISPLAY. THE SIGNIFICANT DIFFERENCE BETWEEN THIS PROPOSAL AND AVAILABLE SYSTEMS IS THAT THE PROPOSED SYSTEM WILL MAINTAIN A TIMER SYNCHRONIZED BETWEEN MULTIPLE MODULES. THE BOARD WILL TIME-STAMP EVENTS BEFORE SENDING THEM TO THE HOST. THIS WILL ALLOW NUMEROUS BOARDS TO PROCESS DATA IN PARALLEL, WHICH THE HOST CAN THEN REASSEMBLE INTO THE CORRECT SEQUENCE USING THE TIME-STAMPS.

* Information listed above is at the time of submission. *

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