SEAKR Engineering, Inc.

Company Information

Company Name
SEAKR Engineering, Inc.
Address
CO
Centennial, CO, 80111-6427
Phone
1 303-790-8499
URL
http://www.seakr.com/
DUNS
122032006
Number of Employees
240
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N

Award Totals

PROGRAM/PHASE
AWARD AMOUNT ($)
NUMBER OF AWARDS
SBIR Phase I
$1,769,900.00
20
SBIR Phase II
$8,732,826.00
11
STTR Phase I
$99,534.00
2
STTR Phase II
$498,372.00
1
Chart code to be here

Award List

  1. Very Dense High Speed 3u VPX Memory and Processing Space Systems

    Amount: $99,981.00

    Today, memory and payload processing systems for space applications are typically designed for a specific application for a specific mission. Many of these systems do not employ a commercial standard ...

    SBIR Phase I 2010 National Aeronautics and Space Administration
  2. Novel Mitigation Techniques for Reconfigurable Computers for Space Based Applications

    Amount: $749,680.00

    SEAKR Engineering's Application Independent Processor (AIP) standard product integrates FPGAs, GPPs and malleable interface support into a flexible onboard processor designed to support many spacecraf ...

    SBIR Phase II 2010 Air ForceDepartment of Defense
  3. Next Generation Reconfigurable Field Programmable Gate Array

    Amount: $678,005.00

    The MAESTRO Phase II SBIR's focus is the design and build of a single board processor based on the MAESTRO chip developed by the U.S. Government. The board will be on a commercial VPX (Vita-46) 6U st ...

    SBIR Phase II 2010 Air ForceDepartment of Defense
  4. STATE (BUBBLE MEMORY) RECORDER

    Amount: $250,000.00

    TAPE RECORDERS PRESENTLY USED AS SPACEBORNE MASS STORAGE DEVICES HAVE A HISTORY OF BEING UNRELIABLE AND REQUIRE EXTENSIVE AND COSTLY GROUND TESTING TO PROVIDE THE CONFIDENCE NECESSARY TO PASS LAUNCH R ...

    SBIR Phase II 1984 Air ForceDepartment of Defense
  5. Utilizing MIL-STD-1553B Digital Data Bus Devices Across an IEEE-1394A Serial Bus

    Amount: $100,000.00

    In this first phase of technical development, this proposal for research and development seeks to design an architecture that will enable MIL-STD-1553B digital data bus monitoring through an isochrono ...

    SBIR Phase I 2002 National Aeronautics and Space Administration
  6. SOLID STATE DIGITAL VOICE/DATA RECORDER

    Amount: $494,230.00

    SEAKR ENGINEERING, INC. WILL DEVELOP AND DEMONSTRATE A SOLID STATE AIRCRAFT VOICE AND DATA RECORDER DESIGN WHICH WILL USE BOTH DATA ENCRYPTION AND DATA COMPRESSION. THE FIRST PART OF THE EFFORT WILL B ...

    SBIR Phase II 1992 NavyDepartment of Defense
  7. Solid State Data Storage for Space Systems

    Amount: $737,418.00

    Most spacecraft require a memory to store data prior to the transmission of the data to an earth station. Until recently, the majority of spacecraft data storage requirements were provided by tape re ...

    SBIR Phase II 1996 Air ForceDepartment of Defense
  8. DESIGN AND FABRICATION OF AN AIRBORNE SOLID STATE RECORDER

    Amount: $750,000.00

    The airborne reconnaissance community currently utilizes tape based storage technology. While this technology is proven, it still suffers from low mean time between failure (MTBF) and substandard dat ...

    SBIR Phase II 1998 Office of the Secretary of DefenseDepartment of Defense
  9. DESIGN AND FABRICATION OF AN AIRBORNE SOLID STATE RECORDER

    Amount: $99,788.00

    The airborne reconnaissance community currently utilizes tape based storage technology. While this technology is proven, it still suffers from low mean time between failure (MTBF) and substandard dat ...

    SBIR Phase I 1998 Office of the Secretary of DefenseDepartment of Defense
  10. Low Volume, Low Power, Real Time Image Processing

    Amount: $69,884.00

    "A low power, low volume, realtime image processor using a re-configurable FPGA based processor design. The flexibility of general purpose processors are blended with the speed of ASICs to accomplish ...

    SBIR Phase I 2002 NavyDepartment of Defense

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