Adaptable/Reconfigurable Distributed Spacecraft Processing

Award Information
Agency: Department of Defense
Branch: Missile Defense Agency
Contract: HQ0006-05-C-7158
Agency Tracking Number: 044-1587
Amount: $99,847.00
Phase: Phase I
Program: SBIR
Awards Year: 2005
Solicitation Year: 2004
Solicitation Topic Code: MDA04-183
Solicitation Number: 2004.4
Small Business Information
6221 S. Racine Circle, Centennial, CO, 80111
DUNS: 122032006
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Damon Van Buren
 Senior Staff Engineer
 (303) 784-7671
Business Contact
 Mark Sventek
Title: Senior Contracts Manager
Phone: (303) 708-5214
Research Institution
On-board processing in satellites and spacecraft has been severely limited by the lack of space-qualified, High-Performance Computing (HPC) hardware. Field Programmable Gate Arrays (FPGAs) are becoming the device of choice for ground based high-performance computing, with tens of millions of gates and clock rates of hundreds of MHz. Recently, Xilinx has begun to offer space-qualified versions of its FPGAs, making it possible to implement high performance HPC hardware for space. SEAKR Engineering has developed a line of RCC computing boards based on the Xilinx Virtex, Virtex-II and Virtex-II Pro FPGAs. These RCC boards are on the leading edge of space-qualified HPC, providing a processing capability that far exceeds other solutions in performance and flexibility. SEAKR's latest RCC takes the capability for high performance computing a step further by implementing a network-based architecture. This Network (NT) RCC uses the Multi-Gigabit Transceivers of the Xilinx devices, along with a Rapid I/O core, to provide high-speed network connections to each of the FPGA coprocessors, and between boards, creating a flexible and expandable processing architecture. Because of SEAKR's experience in building space-qualified hardware, and our unique line of RCC boards, SEAKR is well positioned to provide the MDA with HPC hardware for space.

* Information listed above is at the time of submission. *

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