Simulator Technologies for Rapid Prototyping of Advanced Receiver/Processor

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: F33615-02-M-1204
Agency Tracking Number: 021SN-2968
Amount: $99,884.00
Phase: Phase I
Program: SBIR
Awards Year: 2002
Solicitation Year: N/A
Solicitation Topic Code: N/A
Solicitation Number: N/A
Small Business Information
3915 Germany Lane, Suite 102, Beavercreek, OH, 45431
DUNS: 044329761
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Ronald Clericus
 Senior Engineer
 (937) 255-2811
 rclericus@dramail.com
Business Contact
 Ray Trimmer
Title: Vice President
Phone: (937) 431-1644
Email: rtrimmer@dramail.com
Research Institution
N/A
Abstract
"Man/hardware-in-the-loop laboratory simulation is the most cost-effective methodology for maturing advanced receiver/processor technologies because the battlefield can be brought to the laboratory through multi-spectral synthetic battlespace simulation.Current laboratory RF emission simulators cannot generate the high fidelity, real-time signal environment required to evolve advanced receiver/processor technology development. DRA proposes to solve this challenging technology limitation by developing aModular Analog/Digital Simulator Technology (MAST) concept for rapid prototyping of advanced RF receiver processor capabilities that leverages the Commercial-off-the-shelf (COTS) analog/digital component technology base. MAST will utilize a distributedarchitecture that will support the employment of the DoD High Level Architecture (HLA) concept for conducting collaborative research. The MAST modular architecture concept will utilize digital/analog COTS components to provide a cost effective approachfor rapidly increasing simulator fidelity. MAST will provide simulator technology to develop advanced receiver/processors for new military concepts such as Advanced Tactical Targeting Technologies (AT3) and Advanced Threat Alert and Response (ATAR) forapplication to military aircraft such as F-15, F-16, F-117, B-1B, B-52, B-2, and C-130. During Phase II, DRA will implement a prototype capability into the Sensors Directorate's Integrated De

* Information listed above is at the time of submission. *

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