Highly Parallel LIDAR-based Automated Target Recognition

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: FA8650-18-C-1138
Agency Tracking Number: F161-139-0296
Amount: $749,997.00
Phase: Phase II
Program: SBIR
Solicitation Topic Code: AF161-139
Solicitation Number: 2016.1
Timeline
Solicitation Year: 2016
Award Year: 2018
Award Start Date (Proposal Award Date): 2018-02-02
Award End Date (Contract End Date): 2020-02-02
Small Business Information
1845 West 205th Street, Torrance, CA, 90501
DUNS: 153865951
HUBZone Owned: N
Woman Owned: Y
Socially and Economically Disadvantaged: N
Principal Investigator
 Shahzad Khalid, Ph.D.
 (310) 320-3088
 ATProposals@poc.com
Business Contact
 Gordon Drew
Phone: (310) 320-3088
Email: gedrew@poc.com
Research Institution
N/A
Abstract
To address the Air Force need for an automated target recognition (ATR) capability that uses Light Detection and Ranging (LIDAR), Physical Optics Corporation (POC) proposes to advance the development of the Highly Parallel LIDAR-based Automated Target Recognition (PLATR) system, which was proven feasible in Phase I. PLATR is based on an innovative combination of target isolation, target pose estimation, and target recognition methods that can be computed in a parallel manner. In Phase I, POC demonstrated the feasibility of the PLATR technology by developing and testing a prototype system that successfully detected (cueing) and recognized (classification) military vehicles in LIDAR point cloud data. We demonstrated 98.5% probability of correct classification of military vehicles. Specifically, we have shown that the innovation in efficient and parallel point cloud data processing for ATR will enable the PLATR system to reliably detect military ground vehicles in a variety of landscapes. As a result, this technology offers high probability of detection and real-time operation in a low size, weight, and power (SWaP) processing hardware, which directly addresses the Air Force requirements. In Phase II, POC plans to build and demonstrate a TRL-6 prototype implemented in a low SWaP processing hardware.

* Information listed above is at the time of submission. *

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