Memory Instrumentation and Performance Simulation (MIPS)

Award Information
Agency: Department of Defense
Branch: Defense Threat Reduction Agency
Contract: HDTRA118P-0005
Agency Tracking Number: T172-003-0033
Amount: $149,886.00
Phase: Phase I
Program: SBIR
Solicitation Topic Code: DTRA172-003
Solicitation Number: 2017.2
Timeline
Solicitation Year: 2017
Award Year: 2018
Award Start Date (Proposal Award Date): 2018-04-04
Award End Date (Contract End Date): 2018-11-03
Small Business Information
P.O. Box 422, Trumansburg, NY, 14886
DUNS: 101321479
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Judson Powers
 (607) 257-1975
 jpowers@atcorp.com
Business Contact
 Richard Smioth
Phone: (607) 257-1975
Email: rsmith@atcorp.com
Research Institution
N/A
Abstract
Next-generation high-performance computing (HPC) hardware, such as the Intel Xeon Phi Knights Landing Many-Integrated-Core processor, provide new deep memory architectures that offer the promise of increased performance. The challenge in taking full advantage of this architecture is selecting which data structures will be placed in the high-bandwidth memory. Optimizing data structure placement in memory is a task that requires the assistance of automated tools. To address this need, ATC-NY will develop the Memory Instrumentation and Performance Simulation (MIPS) software, a memory analysis and optimization tool aimed at next-generation HPC memory architectures. MIPS directly instruments as-built optimized binaries, without requiring source code or modification of the software build process, models the behavior of the complete memory hierarchy of a system, and uses this analysis to produce intelligent, actionable advice on memory placement. MIPS also provides the cutting-edge capability to apply memory placement optimization without requiring source code changes, enabling a single software executable to be used on differently-configured systems and for different use cases without requiring software re-engineering and without giving up any potential performance.

* Information listed above is at the time of submission. *

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