Wafer-Level Electronic-Photonic Co-Packaging

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: FA9550-18-C-0016
Agency Tracking Number: F16A-T01-0139
Amount: $749,858.00
Phase: Phase II
Program: STTR
Solicitation Topic Code: AF16-AT01
Solicitation Number: 2016.0
Timeline
Solicitation Year: 2016
Award Year: 2018
Award Start Date (Proposal Award Date): 2018-08-29
Award End Date (Contract End Date): 2020-08-29
Small Business Information
51 East Main Street, Newark, DE, 19711
DUNS: 805473951
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Peng Yao
 (302) 456-9003
 peng@phasesensitiveinc.com
Business Contact
 Renee' Willis-Williams
Phone: (302) 456-9003
Email: willis-williams@phasesensitiveinc.com
Research Institution
 Rochester Instititute of Technology
 Stefan Preble, PhD.
 168 Lomb Memorial Drive
Rochester, NY, 14623
 (585) 475-2635
 Domestic nonprofit research organization
Abstract
In phase II work, we will collaborate with Prof. Stefan Preble in RIT and continue to develop large scale hybrid integration and packaging techniques for key active photonic components such as lithium niobate on insulator (LNOI) modulators and modified uni-traveling (MUTC) photodiodes. We will demonstrate a low V, broadband, small footprint LNOI modulator with hybrid Si/LN or SiN/LN waveguide using the proposed integration process. We will study different coupling schematics for characterization and further system integration of the hybrid LNOI modulator. We will develop and refine the critical wafer bonding and thin-film transferring processes using our new wafer bonding tool to improve fabrication reliability and uniformity. We will develop die-bonding based packaging approach for MUTC PD and PD array using high power SiN waveguides for light routing and pick-and-placed micro-prisms for vertical light coupling. PSI will also start working on a PIC solution for our phased array Tx system. We will condense many of the current functionalities into a single PIC chip design using available building elements as well as new devices modified based on the AIM photonics PDK tool box. We are planning to run two tape-outs to test the developed devices, subsystems and a full Tx processor chip.

* Information listed above is at the time of submission. *

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