FTL Systems, Inc.

Company Information

Company Name
FTL Systems, Inc.
Address
1620 Greenview DR SW
Rochester, MN, -
Phone
1 507-288-3154
URL
http://www.ftlsystems.com
DUNS
928507755
Number of Employees
8
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N

Award Totals

PROGRAM/PHASE
AWARD AMOUNT ($)
NUMBER OF AWARDS
SBIR Phase I
$476,413.00
6
SBIR Phase II
$2,785,859.00
5
Chart code to be here

Award List

  1. Compensation of Superconducting ADC for Improved Accuracy

    Amount: $69,081.00

    Real-time compensation techniques investigated in this effort can improve the precision and accuracy of Superconducting Analog to Digital Converters. Converters of interest include Sigma-Delta (BP and ...

    SBIR Phase I 2010 NavyDepartment of Defense
  2. CAD Conversion Tools for VHDL-AMS Library Generation

    Amount: $746,173.00

    This project enables and incentivizes adaptation of IEEE Draft Standard 1076.1 (VHDL AMS) by mixed signal (analog/digital) engineers by providing a feasible, low risk migration path for existing SPICE ...

    SBIR Phase II 1998 Air ForceDepartment of Defense
  3. CAD Conversion Tools for VHDL-AMS Library Generation

    Amount: $99,628.00

    This project enables and incentivizes adaptation of IEEE Draft Standard 1076.1 (VHDL AMS) by mixed signal (analog/digital) engineers by providing a feasible, low risk migration path for existing SPICE ...

    SBIR Phase I 1997 Air ForceDepartment of Defense
  4. Next Generation CAD Tools for Gigascale Integrated Mixed Signal System on a Chip

    Amount: $99,000.00

    This proposal demonstrates the feasibility of top-down, VHDL-based verificationof gigascale, integrated, mixed-signal system-on-a-chip for military applications.Building on FTL Systems' unique paralle ...

    SBIR Phase I 2001 Defense Advanced Research Projects AgencyDepartment of Defense
  5. Gigascale, Mixed-Signal, Integrated System Verification

    Amount: $375,000.00

    "Next-generation military systems integrating one billion or more transistor-equivalent digital, analog, and high frequency components may be iteratively verified more than 100 times as rapidly by tec ...

    SBIR Phase II 2002 Defense Advanced Research Projects AgencyDepartment of Defense
  6. Streaming Data Capture, Processing and Network Access

    Amount: $69,369.00

    In order to capture incoming data streams at tens of terabits per second continuously or for tens of minutes, it is useful to preprocess the data as close to the collector as possible, then make eithe ...

    SBIR Phase I 2006 NavyDepartment of Defense
  7. Array Clocking with Reduced Jitter Using Taped Delay Lines

    Amount: $69,369.00

    Deriving coherent antenna array clocks from a common tapped delay line driven by a synchronizing pulse per clock cycle results in reduced jitter and optimal beam forming at minimal cost. Phase one eff ...

    SBIR Phase I 2006 NavyDepartment of Defense
  8. Agile, Robust and Concurrent Cross-Correlation From HF Through Ka Band

    Amount: $69,966.00

    Cross-correlation technology investigated in this effort improve electronic warfare and signals intelligence capability relative to that which is known to be deployed. Agility enables detection of ne ...

    SBIR Phase I 2008 NavyDepartment of Defense
  9. Streaming Data Capture, Processing and Network Access from Array of Superconducting Analog to Digital Converters

    Amount: $548,316.00

    Streaming 10GHz+ analog-bandwidth data from two high precision, synchronized, sigma-delta analog to digital converters are captured in a cyrogenic environment via a unique low noise amplifier array. ...

    SBIR Phase II 2008 NavyDepartment of Defense
  10. Low-Jitter/Skew, Tunable, High Bandwidth Clock Generation and Distribution into Cyrogenic Environments

    Amount: $666,426.00

    Tunable clocks targeting 10GHz through greater than 70GHz are optically generated, distributed and interfaced into an array of one or more cyrogenic, electronic operating environments. Design criteri ...

    SBIR Phase II 2008 NavyDepartment of Defense

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