CAD Conversion Tools for VHDL-AMS Library Generation

Award Information
Agency:
Department of Defense
Branch
Air Force
Amount:
$99,628.00
Award Year:
1997
Program:
SBIR
Phase:
Phase I
Contract:
n/a
Agency Tracking Number:
36176
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
Ftl Systems, Inc.
924 Sierra Lane NE, Rochester, MN, 55906
Hubzone Owned:
N
Socially and Economically Disadvantaged:
N
Woman Owned:
N
Duns:
n/a
Principal Investigator:
John Willis/tom Eckenrode
(507) 288-3154
Business Contact:
() -
Research Institution:
n/a
Abstract
This project enables and incentivizes adaptation of IEEE Draft Standard 1076.1 (VHDL AMS) by mixed signal (analog/digital) engineers by providing a feasible, low risk migration path for existing SPICE like models (equivalence), then adds capability beyond that of SPICE (incentive). Specific work items include "black box" VHDL AMS source code generator technology, SPICEcompatible analog solver technology for VHDL AMS simulation, differencing technology enabling comparison of two closely related VHDL AMS models, and modeling technology to realize a VHDL AMS equivalent of SPICE 3 device models in VHDL AMS.

* information listed above is at the time of submission.

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