High Sample-Rate Ultra-Wideband Track-and-Hold Demultiplexer (2007047)

Award Information
Agency: Department of Defense
Branch: Missile Defense Agency
Contract: HQ0006-08-C-7833
Agency Tracking Number: B073-003-0268
Amount: $99,993.00
Phase: Phase I
Program: SBIR
Solicitation Topic Code: MDA07-003
Solicitation Number: 2007.3
Solicitation Year: 2007
Award Year: 2008
Award Start Date (Proposal Award Date): 2008-02-13
Award End Date (Contract End Date): 2009-08-13
Small Business Information
20 Alpha Road, Chelmsford, MA, 01824
DUNS: 131669293
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Michael Hoskins
 Principal Engineer
 (719) 590-1112
Business Contact
 William Hannabach
Title: Director of Programs
Phone: (978) 250-3343
Email: hannabach@hittite.com
Research Institution
Hittite proposes to develop a Radiation-Tolerant Ultra-Wideband Track-and-Hold (T/H) Demultiplexer to address MDA’s future needs for microwave signal sampling/data conversion. This development is motivated by the difficulties in achieving high-speed interleaved analog-to-digital converter (ADC) assemblies with good accuracy. A switched-emitter-follower T/H amplifier in the SiGe BiCMOS process with the capability for 15 GHz sampling bandwidth, 6 – 8 Gs/s sample rate, and 8 – 9 bit accuracy will be studied. This high-speed T/H will be used as the front end of a two-rank T/H sampler/demultiplexer that provides a 2:1 output sample rate reduction, enabling the use of lower rate ADCs in an interleaved assembly without the usual sample timing mismatches that degrade performance. The T/H demultiplexer can also operate as a subsampler to down convert any Nyquist bands within the 15 GHz bandwidth. This T/H circuit is expected to offer unprecedented bandwidth and operating speed while maintaining accuracy suitable for meeting the X-band and microwave data conversion goals of many military systems. Under Phase I, Hittite will perform a design study with circuit simulations to determine the feasibility and performance of the basic T/H amplifier and the two-rank demultiplexer. Prototype circuits will be built and tested in Phase II.

* Information listed above is at the time of submission. *

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