Scalable Reversible Components and Networks for Quantum Computing

Award Information
Agency:
National Aeronautics and Space Administration
Amount:
$69,785.00
Program:
SBIR
Contract:
NAS2-02022
Solitcitation Year:
N/A
Solicitation Number:
N/A
Branch:
N/A
Award Year:
2002
Phase:
Phase I
Agency Tracking Number:
012789
Solicitation Topic Code:
N/A
Small Business Information
HYPRES, Inc.
175 Clearbrook Rd., Elmsford, NY, 10523
Hubzone Owned:
N
Woman Owned:
N
Socially and Economically Disadvantaged:
N
Duns:
N/A
Principal Investigator
 Darren K. Brock,
 Principal Investigator
 (914) 592-1190
 brock@hypres.com
Business Contact
 Ed Kulinski
Title: VP Finance
Phone: (914) 592-1190
Email: ekulinski@hypres.com
Research Institution
N/A
Abstract
Josephson junction based circuits are acknowledged as one of the most promising implementations of solid-state structures for quantum computation (QC). We exploit this advantage by creating networks based on a novel Qubit Quantron Q2 gate. Our approach features low decoherence rates with a scalability to many thousands of logic gates in existing and soon-to-exist commercial Josephson IC foundry services from HYPRES. In Phase I of this project, we move towards the goal of quantum coherent operation by experimentally demonstrating Q2 gates in the classical, but fully (physically and logically) reversible regime. Reversibility is a key prerequisite for any QC approach. In Phase II, Q2 quantum arithmetic networks comprising a main element (a mod N multiplier) of Shor's factoring algorithm will be demonstrated. By a reduction in the minimum linewidth and operating temperature of these circuits, they can be made to function in the quantum coherent regime, yielding full qubit operations. Initiating this work in the classical regime allows us, unlike others, to study several key issues - most importantly, the optimal organization of the information transfer in large reversible networks. This technology development paves the way for the commercial availability of a scalable quantum coherent logic for complex reversible networks.

* information listed above is at the time of submission.

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