Advanced Architectures for Interference-Tolerant Digital Receiver

Award Information
Agency: Department of Defense
Branch: Navy
Contract: N00014-07-C-0452
Agency Tracking Number: N061-071-0348
Amount: $749,768.00
Phase: Phase II
Program: SBIR
Awards Year: 2007
Solicitation Year: 2006
Solicitation Topic Code: N06-071
Solicitation Number: 2006.1
Small Business Information
175 Clearbrook Road, Elmsford, NY, 10523
DUNS: 103734869
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Deepnarayan Gupta
 VP Research and Developme
 (914) 592-1190
Business Contact
 Edward Kulinski
Title: VP Finance and Administra
Phone: (914) 592-1190
Research Institution
A longstanding problem with wideband radio receivers for sensitive naval applications (such as Signals Intelligence or SIGINT) is the high level of RF interference from co-located RF transmitters. This Phase II project will develop a new generation of analog-to-digital converters (ADCs) that exhibit unusually large dynamic range and linearity, for incorporation at the front-end of a digital receiver that may detect weak signals without saturation due to "co-site interference." HYPRES has been developing a superconducting digital-RF receiver system for the Navy and other DoD users, based on an ultrafast ADC sampled at 20 GHz, which exhibits an impressive spur-free dynamic range (SFDR) greater than 100 dB for a bandwidth of 10 MHz. Even further dynamic range improvement is possible with the use of advanced multi-rate architectures. In Phase I, we designed and demonstrated the operation of a high dynamic range "quarter-rate quantizer," which can operate on data streams as fast as 100 GHz, while the output data is processed at 1/4th the rate. In Phase II we will implement complete ADCs based on this multi-rate approach, which will increase the dynamic range of the ADCs by at least 2 bits, in addition to a 1.5 bit increase associated with ongoing process improvements.

* information listed above is at the time of submission.

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