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Continuous-Time Digital Signal Processing (DSP) Using Reconfigurable Devices

Award Information
Agency: Department of Defense
Branch: Army
Contract: W9113M-20-C-0092
Agency Tracking Number: A201-080-1518
Amount: $110,400.93
Phase: Phase I
Program: SBIR
Solicitation Topic Code: A20-080
Solicitation Number: 20.1
Solicitation Year: 2020
Award Year: 2020
Award Start Date (Proposal Award Date): 2020-06-23
Award End Date (Contract End Date): 2021-03-29
Small Business Information
2904 Westcorp Blvd Suite 210
Huntsville, AL 35805-1111
United States
DUNS: 832864370
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Michael Pukish
 (256) 319-2026
Business Contact
 Daniel Faircloth
Phone: (256) 319-2026
Research Institution

Signal and information processing advancements are the backbone of key enabling technologies for decisive overmatch on the battlefield. Progress specifically in digital signal processing (DSP) methods directly impacts Long Range Precision Fires and Air and Missile Defense Army Modernization Priorities. With each new generation of sensors, the requirements of these processing capabilities must also advance, and it is unclear if conventional DSP can continue to rise to the challenge within such constrained environments, where the available size, weight, power, and cost (SWaP-C) are limited.  In this effort, IERUS Technologies and its partners will design and implement unclocked signal processing blocks in a reconfigurable platform with reduced power consumption when compared to conventional DSP. To do so, the team will combine three existing research fields from signal processing: (i) asynchronous analog-to-digital converters (ADCs), (ii) asynchronous Field Programmable Gate Arrays (FPGAs), and (iii) Continuous-Time Digital Signal Processing (CTDSP).  Our efforts will target the development of unclocked modules that work with/alongside existing DSP operations. Our primarily focus will be maturing FPGA-based CTDSP modules with the development of designs and methodologies that are vendor agnostic and capable of replacing and/or complementing DSP blocks.

* Information listed above is at the time of submission. *

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