Solid-state, Sub-nanosecond Pulse Sharpener for Generating High Power Impulses

The Office of Naval Research (ONR) has issued this SBIR topic to fund the development of a solid-state closing switch capable of producing high power UWB electrical pulses with dV/dt of up to 200 V/ps, 10-90% risetime 200 ps or faster, and 300 ps durations.  Achieving switching speeds this fast at medium-to-high voltage levels (240 V and above) is not possible with nanosecond switching technologies that rely on carrier motion through a structure because carriers traveling at their saturated velocity will travel approximately only 1/5th the distance of the depletion region of a Si device with an electrostatic breakdown rating of 1 kV.  To achieve these specifications, Transient Plasma Systems, Inc. (TPS), in collaboration with General Electric Global Research (GE), proposes to develop a two-terminal device that is switched via an avalanche process, in which switching times are governed not by time of flight of saturated velocity carriers, but instead by the ionization rate in the high-field region of the device that exists when electric fields up to and in excess of twice the static breakdown voltage are applied.  This proposed effort will investigate Silicon Avalanche Shaping/Sharpening (SAS) device structures for both Si and SiC, with Si being viewed as the conservative approach for achieving the threshold specifications of this topic.  Less work has been done to investigate the capabilities of SiC for SAS devices, but its superior material properties suggest it is likely well suited for impact-ionization avalanche switching, which does not rely on long minority carrier lifetime for practical implementation. TPS and GE have a demonstrated track record collaborating on SiC devices for pulsed power applications, having collaborated on an ARMY SBIR on high voltage, high dI/dt SiC thyristor for munition fuzing applications.  More recently, TPS and GE have collaborated in the development of SiC DSRDs, and GE recently reported modeling work on a SiC DSRD as a >10 kV pulsed power opening switch using MIXED-MODE simulation. For this effort, TPS and GE propose to conduct MIXED-MODE TCAD simulations for Si and SiC avalanche diodes.  The simulation results will be bench marked against measured data taken from existing devices that are not optimized for avalanche pulse shaping, but have a reasonably close structure.  Dynamic material properties required for accurate TCAD simulation will be extracted from bench top measured data for both Si and SiC candidate devices.  TPS and GE will position themselves to fabricate optimized Si and SiC SAS devices during Phase II to achieve the specifications outlined in the topic, in particular the goal dV/dt of 200 V/ps and dynamic breakdown rating that is 3x higher than static.  TPS is not aware of a compact solid-state switching technology that has demonstrated that level of performance.