Highly Integrated Silicon (Si)-based RF electronics

Award Information
Agency: Department of Defense
Branch: Defense Advanced Research Projects Agency
Contract: W31P4Q-09-C-0141
Agency Tracking Number: 08SB2-0717
Amount: $98,999.00
Phase: Phase I
Program: SBIR
Awards Year: 2009
Solicitation Year: 2008
Solicitation Topic Code: SB082-044
Solicitation Number: 2008.2
Small Business Information
2500 Maitland Center Parkway, Suite 203, Maitland, FL, 32751
DUNS: 791134542
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Michael Hagedorn
 Senior Technical Staff
 (407) 660-9900
Business Contact
 Ryan Jorgenson
Title: VP Engineering
Phone: (407) 660-9900
Email: rjorgenson@camgian.com
Research Institution
Today’s warfighter is reliant upon more and more technological support to achieve strategic and tactical superiority over their enemies. Technological advantages include such items as night-vision equipment, unattended ground sensors (UGS), unmanned aerial vehicles (UAVs), target tracking beacons, etc. To be effective, these need to be as small and as lightweight as possible. This leads to the drive for the integration of disparate technologies, such as high performance RF circuitry and large scale digital signal processing, into more and more dense circuits to achieve the maximum Size, Weight and Power (SWaP) reductions possible. The ability to increasingly integrate complex digital logic with analog/RF circuits on the same device, makes revolutionary new products feasible. As a case in point, Camgian Microsystems, is developing a revolutionary new UGS that combines radar, camera, digital signal processing and a communications system. The device must achieve lower power and area than are possible with discrete integration. This SBIR program will use this applications to push the limits of state-of-the-art, seeking to demonstrate the ability to provide revolutionary integration levels, combining high performance RF circuits with large quantities of complex digital logic, all on a low cost, small geometry silicon CMOS process.

* Information listed above is at the time of submission. *

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