APPLICATION OF VLSI TO VECTOR ACCUMULATORS AND INTEGRATING TIME TO DIGITAL CONVERTER

Award Information
Agency:
Department of Defense
Branch:
Defense Advanced Research Projects Agency
Amount:
$49,968.00
Award Year:
1987
Program:
SBIR
Phase:
Phase I
Contract:
N/A
Agency Tracking Number:
6004
Solicitation Year:
N/A
Solicitation Topic Code:
N/A
Solicitation Number:
N/A
Small Business Information
Ionwerks
2215 Addison, Houston, TX, 77030
Hubzone Owned:
N
Socially and Economically Disadvantaged:
N
Woman Owned:
N
Duns:
N/A
Principal Investigator
 DR FHOWARD K SCHMIDT
 (713) 529-9040
Business Contact
Phone: () -
Research Institution
N/A
Abstract
DESIGN, SIMULATION, FABRICATION, AND EVALUATION OF A PROTOTYPE VERY LARGE SCALE INTEGRATION (VLSI) DATA ACQUISITION SUBSYSTEM IS PROPOSED. AVAILABLE STATE-OF-THE-ART ONE MICRON CMOS TECHNOLOGY MAY ALLOW INCORPORATION OF MORE THAN 128 CHANNELS OF 24-BIT 300 MHZ COUNTERS INTO A SINGLE INTEGRATED CIRCUIT. A PROTOTYPE SYSTEM OF SIMPLE REPEATED CELLS OF COUNTERS, CONTROL AND I/O BUFFERS HAS BEEN DESIGNED FOR THE EVALUATION OF THE FEASIBILITY OF CONSTRUCTING INTEGRATED NUCLEAR DATA SUBSYSTEMS AND PRE-PROCESSORS. THE PROTOTYPE DEVICE HAS VERSATILE CONTROL CIRCUITRY ALLOWING OPERATION AS A MULTICHANNEL SCALER (MCS), A ZERO DEAD-TIME INTEGRATING TIME-TO-DIGITAL CONVERTER (ITDC), OR A VECTOR ACCUMULATOR (VA). CONSTRUCTION OF SPECIFIC DATA ACQUISITION SYSTEMS IS INTENDED IN FOLLOW ON WORK AND IS DISCUSSED.

* information listed above is at the time of submission.

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