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Entangled Photon Pair SourceBased On Thin-Film Lithium-Niobate-On-InsulatorPhotonic Integrated Circuits

Award Information
Agency: National Aeronautics and Space Administration
Branch: N/A
Contract: 80NSSC21C0125
Agency Tracking Number: 212489
Amount: $124,962.00
Phase: Phase I
Program: STTR
Solicitation Topic Code: T5
Solicitation Number: STTR_21_P1
Timeline
Solicitation Year: 2021
Award Year: 2021
Award Start Date (Proposal Award Date): 2021-05-07
Award End Date (Contract End Date): 2022-06-19
Small Business Information
116 Sandy Dr.
Newark, DE 19713-1187
United States
DUNS: 805473951
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 Peng Yao
 (302) 286-5191
 yao@phasesensitiveinc.com
Business Contact
 Ahmed Sharkawy
Phone: (302) 898-5544
Email: sharkawy@phasesensitiveinc.com
Research Institution
 University of Delaware
 
0000
Newark, DE 19716-0099
United States

 Nonprofit College or University
Abstract

Herein, PSI propose a system-on-chip (SoC) solution for an entangled photon pair source (EPPS) based on thin-film lithium niobate on insulator (TFLNOI) photonic integrated circuits (PIC). Using integrated photonic devices such as fiber coupler, waveguide, modulator, splitter/combiner and micro-ring, the proposed EPPS can generate and process the entangled photons with high efficiency and speed. In phase I effort, we will study and model the proposed EPPS at the system level and layout specs for key components and systems. We will develop the periodic poling process for the target TFLNOI platform. And we will design and experimentally demonstrate high-efficiency spontaneous parametric down conversion (SPDC) photon pair generation at telecommunication wavelength toward the end of the phase I work. In addition, a variety of PIC components such as waveguide, splitter/coupler, switch, modulator and filter will also be investigated theoretically and/or experimentally leveraging other ongoing government funded projects. The end result of the phase I work includes a demonstrated SPDC structure on a TFLNOI substrate, a system model and a system PIC design leveraging PSI existing PIC components, which will pave the path toward a full SoC prototype in phase II. Based on our pioneer work in TFLNOI PICs development and with our successful experiences in commercialization of SBIR research efforts, PSI is poised to develop, package, qualify and commercialize the proposed EPPS chip for tomorrowrsquo;s quantum communication demands.

* Information listed above is at the time of submission. *

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