Fabrication of GaN Schottky Diode Power Rectifiers on GaN Substrates Using Advanced Metal Contacts

Award Information
Agency: Department of Defense
Branch: Missile Defense Agency
Contract: W9113M-04-C-0082
Agency Tracking Number: B2-0552
Amount: $0.00
Phase: Phase I
Program: STTR
Awards Year: 2004
Solicitation Year: N/A
Solicitation Topic Code: N/A
Solicitation Number: N/A
Small Business Information
KYMA TECHNOLOGIES, INC.
8829 Midway West Road, Raleigh, NC, 27617
DUNS: 020080607
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 N. Williams
 Director of GaN
 (919) 789-8880
 williams@kymatech.com
Business Contact
 Edward Pupa
Title: President/CEO
Phone: (919) 789-8880
Email: epupa@kymatech.com
Research Institution
 Auburn University
 Minseo Park
 Department of Physics, 309 Allison Laboratory
Auburn, AL, 36849
 (334) 844-4270
 Nonprofit college or university
Abstract
The Phase II STTR will demonstrate the device operation of a GaN Schottky diode power rectifier. Kyma Technologies, Inc. will collaborate with investigators at Auburn University and North Carolina State University for materials growth/characterization and device fabrication/testing. The fabrication of a conventional Schottky diode relies on heteroepitaxy on lattice- and thermal-mismatched foreign substrates that generate a high concentration of defects which deteriorate the performance of the diode operation. The revolutionary route to solve this problem is to use homoepitaxy to create high quality GaN epilayers, which has not been possible due to the unavailability of native GaN wafers. Utilizing a back-side ohmic contact developed during the Phase I STTR program, a "vertical" Schottky diode structure with reduced threading dislocations can be fabricated. The Schottky diode power rectifier will be fabricated on Kyma's conductive single crystal GaN wafers. High resistivity GaN epilayers will be deposited on the wafer via molecular beam epitaxy using ammonia as a nitrogen source, followed by the formation of p+ guard ring regions via ion implantation. The top Schottky and bottom ohmic contact will be prepared on top-side epilayer and back-side N-face GaN wafer, respectively. The electronic properties of the Schottky diode will be characterized and the device structure will be optimized.

* information listed above is at the time of submission.

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