DESIGN OF "SMART" PHASED ARRAYS UTILIZING MASSIVELY PARALLELCOMPUTER ARCHITICTURES

Award Information
Agency:
National Science Foundation
Branch
n/a
Amount:
$48,826.00
Award Year:
1991
Program:
SBIR
Phase:
Phase I
Contract:
n/a
Agency Tracking Number:
14356
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
Massachusetts Technological La
312 Austin Street, W. Newton, MA, 02165
Hubzone Owned:
N
Socially and Economically Disadvantaged:
N
Woman Owned:
N
Duns:
n/a
Principal Investigator:
Dr. Ta-ming Fang
Chief Scientist
() -
Business Contact:
() -
Research Institution:
n/a
Abstract
RESEARCH CONDUCTED AT MASSACHUSETTS TECHNOLOGICAL LABORATORY(MTL) HAS DEMONSTRATED SIGNIFICANT GAINS IN EXECUTION SPEED IN PHASED ARRAY ALGORITHMS FOR NULL-STEERING AND ADAPTIVE NULLING BY IMPLEMENTATION IN THE FINE-GRAINED ("DATA LEVEL")PARALLEL COMPUTATIONAL ARCHITECTURE OF THE CONNECTION MACHINE. SUCH WORK SUGGESTS THAT SIGNIFICANT GAINS IN PHASED ARRAY PERFORMANCE MAY BE OBTAINED BY THE DEVELOPMENT OF A "SMART" PHASED ARRAY, WHERE COMPUTATIONAL ELEMENTS ARE DISPERSED AMONG THE PHASED ARRAY ELEMENTS AND AN APPROPRIATENETWORK OF INTERCONNECTIONS FOR TRANSFER OF INFORMATION BETWEEN PROCESSORS IS PROVIDED. SUCH A "SMART" PHASED ARRAYHAS THE POTENTIAL FOR SUBSTANTIALLY REDUCE HIGH DATA-RATE, LARGE BANDWIDTH COMMUNICATION WITH A CENTRAL COMPUTER, AND RAPID (MICROSECOND TIME SCALE) NULLING. ADDITIONAL CAPABILITIES FOR THE REAL-TIME MONITORING OF ARRAY PERFORMANCE AND LIMITED AUTOMATIC FAILURE COMPENSATION ("SELF-HEALING") ALSO APPEAR PROMISING. THE CONNECTION MACHINE ARCHITECTURE IS HIGHLY SUITABLE FOR THE DEVELOPMENT OF ALGORITHMIC TOOLS AND SIMULATIONS FOR THE STUDY OF "SMART" PHASED ARRAYS. A PROGRAM OF RESEARCH TO DEMONSTRATETHE FEASIBILITY OF "SMART" PHASED ARRAYS BY SIMULATIONS ON THE CONNECTION MACHINE AND FOR THE STUDY OF THEIR PROPERTIESIS OUTLINED.

* information listed above is at the time of submission.

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