Scalable Programming models for Battle Command App

Award Information
Agency: Department of Defense
Branch: Army
Contract: W911QX-10-C-0033
Agency Tracking Number: A092-041-1310
Amount: $69,977.00
Phase: Phase I
Program: SBIR
Awards Year: 2009
Solicitation Year: 2009
Solicitation Topic Code: A09-041
Solicitation Number: 2009.2
Small Business Information
MaXentric Technologies LLC
2071 Lemoine Avenue Suite 302, Fort Lee, NJ, 07024
DUNS: 145051095
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Houman Ghajari
 Director
 (858) 272-8800
 houman@maxentric.com
Business Contact
 Kamran Mahbobi
Title: Managing Director
Phone: (201) 242-9805
Email: kmahbobi@maxentric.com
Research Institution
N/A
Abstract
Technology trends from the last decade indicate that future processing platforms will become increasingly parallel, driven by the development of multi-core chips and multi-chip processing systems. Such architectures have the potential for large speedups for many applications, but parallel programming techniques are required to exploit the parallel computational resources. However, in most industries, rewriting software to fit this new programming model is impractical. In an effort to conserve the applicability and improve the performance of legacy software, then it would be desirable to develop a technology that facilitates a distributed runtime environment for groups of concurrently running but cooperative codes that share data efficiently. Traditionally, this is done with coarse-grained synchronous I/O, where cooperating codes access files as a shared data medium. This is often inefficient, however, because a process may block on the availability of a complete file when in fact the data it needs is some subset of the file that is ready. Maxentric proposes to develop the Corevoyant Runtime system for facilitating data sharing between concurrently running software with no knowledge a priori of the sharing interface. This will enable legacy codes to run concurrently (e.g. on different cores or processors), significantly improving overall system performance.

* information listed above is at the time of submission.

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