Using Next Generation Processors

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: FA8750-09-C-0055
Agency Tracking Number: F073-018-1120
Amount: $746,484.00
Phase: Phase II
Program: SBIR
Awards Year: 2009
Solitcitation Year: 2007
Solitcitation Topic Code: AF073-018
Solitcitation Number: 2007.3
Small Business Information
MaXentric Technologies LLC
2071 Lemoine Avenue Suite 302, Fort Lee, NJ, 07024
Duns: 145051095
Hubzone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Houman Ghajari
 Project Manager
 (858) 272-8800
 houman@maxentric.com
Business Contact
 Kamran Mahbobi
Title: Managing Director
Phone: (201) 242-9800
Email: kmahbobi@maxentric.com
Research Institution
N/A
Abstract
Next generation processors attain better performance than existing microprocessors because the abstraction layers better expose the underlying VLSI resources (transistors, wires, pins, ...) and constraints (e.g., wire delay, power, ...). However, the management of these resources and constraints requires the development of more sophisticated hardware and software mechanisms, both to improve efficiency and to ease programmer burden. MaXentric believes the largest advances in the next decade of computer architecture will center around these mechanisms. Our vision is a tool chain of software support that helps the user parallelize applications from choosing the appropriate architecture to analyzing and profiling the application for potential re-organization and improvement. We propose one piece of this chain, codenamed PAMM (Problem-Architecture Mapping for Multi-core) that helps the user select an architecture for a given application and to make optimizations based on that architecture. During Phase I, MaXentric demonstrated the feasibility of the approach. During Phase II, the technical team will build a PAMM prototype for Phase III commercialization. BENEFIT: Moore''''s law has provided computer architects with a wealth of on chip resources. Next generation processors reflect the latest innovative responses to advances in integration technologies. However, from a programmer''''s perspective, parallelization is still a difficult task with a lack of tool chain support and a small community. Tools developed under this SBIR project will be equipped to support high performance application development projects in the commercial and defense realms. Value added to a project has two flavors. Firstly, these tools will aid in the acquisition of computing resources, allowing project managers to select hardware that best fits their applications and consequently slashing unnecessary costs. Secondly, the tools will assist the programmers in the project as they build their applications, decide how to map them to architectures, and optimize their code for higher performance. Both the defense and commercial sectors are interested in computationally intensive problems that could be accelerated by a well chosen next generation processor.

* information listed above is at the time of submission.

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