DEDICATED PERIPHERAL FOR ENHANCED MINIMUF EXCUTION DEVELOPMENT

Award Information
Agency:
Department of Defense
Branch
Navy
Amount:
$371,000.00
Award Year:
1987
Program:
SBIR
Phase:
Phase II
Contract:
n/a
Award Id:
4129
Agency Tracking Number:
4129
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
3930 Freedom Circle - Ste A, Santa Clara, CA, 95054
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
n/a
Principal Investigator:
John R Conkle
(408) 748-1130
Business Contact:
() -
Research Institute:
n/a
Abstract
THE MINIMUF ALGORITHM HAS BEEN USED VERY SUCCESSFULLY AS A PREDICTIVE TOOL FOR DETERMINING THE MUF OF AN HF CIRCUIT. THE ALGORITHM IS CURRENTLY IMPLEMENTED AS A BASIC PROGRAM. THE USEFULNESS OF THIS ALGORITHM WOULD BE GREATLY ENHANCED IF THE ALGORITHM COULD BE IMPLEMENTED SUCH THAT A TIME, FREQUENCY PAIR CALCULATION COULD BE COMPLETED IN 1 MS (GOAL). THIS PROPOSAL PRESENTS AN ANALYSIS AND PRELIMINARY HARDWARE AND SOFTWARE DESIGN TO ENHANCE THE SPEED OF THE MINIMUF ALGORITHM. THE APPROACH UTILIZES A DEDICATED PERIPHERAL CARD WHICH OCCUPIES AN EXPANSION SLOT OF AN IBM PC OR COMPATIBLE COMPUTER. THE HARDWARE UTILIZES AN 8086 MICROPROCESSOR AND AN 8087 MATH COPROCESSOR WITH THE SOFTWARE WRITTEN IN ASSEMBLY LANGUAGE. COMPUTATION SPEEDS APPROACHING 3 MS ARE EXPECTED USING THIS APPROACH.

* information listed above is at the time of submission.

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