Algorithm Development for Reconfigurable Computing Architectures

Award Information
Agency:
Department of Defense
Branch
Air Force
Amount:
$99,958.00
Award Year:
2007
Program:
STTR
Phase:
Phase I
Contract:
FA9550-07-C-0126
Award Id:
83340
Agency Tracking Number:
F074-017-0015
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
501 N Morton St, Suite 106AB2, Bloomington, IN, 47404
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
144584328
Principal Investigator:
NicolaGranny
Chairman & CTO
(812) 824-8226
ngranny@mnbtech.com
Business Contact:
NicolaGranny
Chariman & CTO
(812) 824-8226
ngranny@mnbtech.com
Research Institute:
THE OHIO STATE UNIV.
Lisa Jones
154 W. 12th Avenue
Attn: OSU Research Foundation
Columbus, OH, 43210
(614) 247-8348
Nonprofit college or university
Abstract
High performance reconfigurable computing (HPRC) is an expanding technology offering workstations and small clusters performance levels previously reserved for large-scale systems populating the "Supercomputing 500" list. However, the lack of open-source libraries of generically applicable numeric methods (i.e. BLAS, LAPACK, Numeric Recipes, etc.) optimized for FPGA embodiment has hindered adoption of HPRC by mainstream technical/scientific computing users. MNB Technologies and our academic partner, The Ohio State University, will simplify the HPRC development model. The approach has four thrust areas: 1) partially automating the process of developing HPRC optimized HDL from symbolic math, 2) extending HDL customization capabilities enabling hierarchical modeling using generic cores automatically customized for the target platform, 3) creation of a standard modeling and validation framework for quick and economical population of the library by the open source community, and 4) creation of a model integration tool "plug-in" for common application development environments. This approach provides an open-source use model for disadvantaged users and considerable commercialization opportunities for proprietary extensions to service both the HPRC and EDA (electronic design automation) market segments.

* information listed above is at the time of submission.

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