Algorithm Development for Reconfigurable Computing Architectures

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: FA9550-09-C-0070
Agency Tracking Number: F074-017-0015
Amount: $749,469.00
Phase: Phase II
Program: STTR
Awards Year: 2009
Solitcitation Year: 2007
Solitcitation Topic Code: AF07-T017
Solitcitation Number: N/A
Small Business Information
MNB Technologies, Inc.
1194 E Winners Cir., Bloomington, IN, 47401
Duns: 144584328
Hubzone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Nicola V Granny
 Chairman & CTO
 (812) 824-8226
 ngranny@mnbtech.com
Business Contact
 Nicola Granny
Title: Chairman & CTO
Phone: (812) 824-8226
Email: ngranny@mnbtech.com
Research Institution
 The Ohio State University
 Lisa Jones
 425 Stillman Hall
Columbus, OH, 43210
 (614) 247-8348
 Nonprofit college or university
Abstract
High performance reconfigurable computing (HPRC) is an expanding technology offering workstations and small clusters performance levels previously reserved for large-scale systems populating the Supercomputing 500 list. However, the lack of open-source libraries of generically applicable numeric methods (i.e. BLAS, LAPACK, Numeric Recipes, etc.) optimized for FPGA embodiment has hindered adoption of HPRC by mainstream technical/scientific computing users. MNB Technologies and our academic partner, The Ohio State University, will simplify the HPRC development model. The approach has four thrust areas: 1) expert sytsems partially automating the process of developing HPRC optimized HDL from symbolic math, 2) extending Verilog customization capabilities enabling hierarchical modeling using generic cores automatically customized for the target platform, 3) creation of a standard modeling and validation framework for quick and economical population of the library by the open source community, and 4) creation of a model integration tool plug-in for common application development environments. This approach provides an open-source use model for disadvantaged users and considerable commercialization opportunities for proprietary extensions to service both the HPRC and EDA (electronic design automation) market segments. BENEFIT: 1) Application developers, not just hardware engineers, will be able to create and use efficient platform-customized models. 2) Core library models are generically useful across all implementation platforms. 3) The library is efficiently and economically populated and maintained by the open source community. 4) The standardized models and automated customization enables cross-platform utility of HPRC application programs. 5) Open source deployment of all core elements provides a practical tool for disadvantaged users. 6) Platform vendors will produce customization libraries to support their proprietary products. 7) Tool vendors will produce commercial extensions of the tools tuned to the specific needs of their chosen market segments. 8) HPRC consultants will produce application-specific core models that may be easily marketed across a variety of execution platforms.

* information listed above is at the time of submission.

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