Microchip MEMS Iron Maiden

Award Information
Agency: Department of Defense
Branch: Army
Contract: W31P4Q-06-C-0358
Agency Tracking Number: O053-A12-2208
Amount: $99,991.00
Phase: Phase I
Program: SBIR
Awards Year: 2006
Solicitation Year: 2005
Solicitation Topic Code: OSD05-A12
Solicitation Number: 2005.3
Small Business Information
NANOHMICS, INC.
6201 East Oltorf St., Suite 400, Austin, TX, 78741
DUNS: 100651798
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Don Patterson
 Principal Scientist
 (512) 389-9990
 dpatterson@nanohmics.com
Business Contact
 Keith Jamison
Title: President
Phone: (512) 389-9990
Email: kjamison@nanohmics.com
Research Institution
N/A
Abstract
As a last resort, self-destruct technologies must be employed to protect sensitive electronic data. Squib-induced pyrotechnics and low energy electro-explosives that provide a controlled explosive force can be effective in the destruction of the silicon microchip. However, explosives and chemical reactants packaged with electronic devices pose safety, storage and disposal hazards even if the detonation mechanism is reliably safe. Likewise, electronic self-destruct methods require high power and homogenous field distribution to be effective at data disruption and run the risk of leaving the microcircuitry intact for visual inspection by an adversarial reverse engineer. As an alternative, Nanohmics proposed to develop a novel method to physically destroy the silicon microcircuity using a method of micromechanical pulverization. In this regard, a package-level MEMS device will be driven into the circuit side of a silicon microchip (e.g. microprocessor, memory, sensors). In the event of a triggered mechanical actuation , the MEMS device will impact the silicon surface resulting in massive fragmentation of the frangible silicon microchip. Physical fragmentation will render the microchip (e.g. microprocessor, flash memory, sensor) irrecoverably inoperable and the electronic content as well as the physical chip architecture untraceable.

* information listed above is at the time of submission.

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