Integrating Field Gate Programmable Arrays on Flexible, Thin, and Layered Substrates

Award Information
Agency: Department of Defense
Branch: Air Force
Contract: FA9453-08-M-0022
Agency Tracking Number: F073-099-1501
Amount: $100,000.00
Phase: Phase I
Program: SBIR
Awards Year: 2008
Solicitation Year: 2007
Solicitation Topic Code: AF073-099
Solicitation Number: 2007.3
Small Business Information
2100 N Alafaya Trail, Suite 200, Orlando, FL, 32826
DUNS: 147216001
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Kenneth H Church
 Principal Investigator
 (407) 275-4720
Business Contact
 Marva Sanders
Title: Chief Operating Officer
Phone: (407) 249-3683
Research Institution
If we could translate the benefits of 2-D integrated circuits into the third (vertical) dimension, it may be possible to extend Moore’s Law to the year 2060, creating dramatic new possibilities in missile and space systems. By tightly integrating a Field Gate Programmable Array (FPGA) with an often large population of peripheral components into a miniaturized 3D structure, the development and fabrication timeframe of the overall system will be reduced by concealing the complexity of the FPGA from system designers. Through miniaturization and reduced trace lengths resulting from 3D form, parasitic impedances will be reduced and consequently will improve the system by 1) reducing ground bounce and voltage droop in the FPGA’s power network, 2) reducing losses in high speed data buses, and 3) improving Electro-Static Discharge (ESD) performance of the overall system. By eliminating the complexity of the hundreds or thousands of peripheral components from the system designer, reconfigurable devices will be deployed in DoD and military applications with a dramatic reduction in both time and effort.

* Information listed above is at the time of submission. *

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