DEVELOPMENT OF 32 BIT SINGLE BOARD COMPUTER SYSTEMS IN FASTBUS PACKAGING

Award Information
Agency: Department of Energy
Branch: N/A
Contract: N/A
Agency Tracking Number: 422
Amount: $499,992.00
Phase: Phase II
Program: SBIR
Awards Year: 1984
Solicitation Year: N/A
Solicitation Topic Code: N/A
Solicitation Number: N/A
Small Business Information
Nycb Real-time Computing Inc.
106 Rocky Point Gardens, Rocky Point, NY, 11778
DUNS: N/A
HUBZone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Eric J. Siskind Ph.d.
 () -
Business Contact
Phone: () -
Research Institution
N/A
Abstract
A FASTBUS PACKAGED 32 BIT COMPUTING SYSTEM INCLUDING BOTH FASTBUS HARDWARE AND SOFTWARE FOR PROGRAM DEVELOPMENT, DEBUGGING, AND RUN-TIME SUPPORT WILL BE DEVELOPED. THE HARDWARE WILL FEATURE A 32 BIT CPU, PREFERABLY IMPLEMENTING THE DEC VAX ARCHITECTURE, BUT NOT IMMEDIATELY EXCLUDING CURRENT OFFERINGS FROM INTEL, MOTOROLA, HEWLETT-PACKARD, OR NATIONAL SEMICONDUCTOR, PLUS ON-CARD MAIN MEMORY IN THE RANGE FROM .5 TO 2.0 MEGABYTES, AND NECESSARY PERIPHERALS INCLUDING A FASTBUS INTERFACE. SOFTWARE WILL INCLUDE CODE DEVELOPMENT AND DEBUGGING TOOLS DESIGNED TO RUN ON A DEC VAXHOST, PLUS DOWNLINE LOADERS AND RUN-TIME SUPPORT DESIGNED TOALLOW COMMUNICATION BETWEEN THE TARGET PROCESSOR AND BOTH THE HOST AND OTHER TARGET PROCESSORS.

* information listed above is at the time of submission.

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