Multi-processor Embedded Front-End Electronics Platform with Multi-Function Network for Pulsed Accelerator Control Systems

Award Information
Agency: Department of Energy
Branch: N/A
Contract: DE-FG02-05ER84366
Agency Tracking Number: 78911S05-I
Amount: $600,000.00
Phase: Phase II
Program: SBIR
Awards Year: 2006
Solitcitation Year: 2006
Solitcitation Topic Code: 36
Solitcitation Number: DE-FG02-06ER06-09
Small Business Information
NYCB Real-time Computing, Inc.
18 Meudon Drive, Locust Valley, NY, 11560
Duns: N/A
Hubzone Owned: N
Woman Owned: N
Socially and Economically Disadvantaged: N
Principal Investigator
 Eric Siskind
 (516) 759-0707
Business Contact
 Eric Siskind
Title: Dr.
Phone: (516) 759-0707
Research Institution
Electronics for pulsed front-end devices at pulsed particle accelerators are typically accessed through up to 4 networks, which carry timing information, pulse-to-pulse sequencing, real-time streaming data, and configuration information, respectively. Although modern commercial networks offer a rich variety of features, they are not well optimized to the needs of pulsed accelerators for clocking, pulse-by-pulse control, or reliable real-time data acquisition with sub-millisecond timeouts in an electrically noisy environment. In this project, circuit switching will be used to provide preferential delivery of real-time data streams, with error correction adding noise immunity. The accelerator clock frequency will be carried by synchronizing the data link byte clock to the accelerator clock. Clock phase and fiducial timing data will be sent by custom extensions to the circuit switching protocols. In Phase I, a previously-developed approach for circuit switching both real-time and non-real-time data onto a single network physical link, via additional hardware inserted between the media access and serializer-deserializer layers, was extended to carry accelerator clock and fiducial timing data. A method for coupling multiple power PC processors embedded within a single field programmable gate array via shared memory was developed. In Phase II, the hardware design will be completed and two prototype circuit boards will be constructed and debugged. A large volume of real-time operating system and application-level software will be developed. End-to-end testing will demonstrate simultaneous real-time data streaming and Internet-accessible, non-real-time, data acquisition control and data analysis. Commercial Applications and other Benefits as described by the awardee: The technology should find application in embedded device controllers for accelerator devices that provide large volumes of data during each pulse ¿ data that must be processed before the next pulse is generated. The technology should lead to more reliable accelerators and significant increases in average effective luminosity. Other applications include computer network interface cards and network fabric switching points.

* information listed above is at the time of submission.

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