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SPACECRAFT SUPERCOMPUTER

Award Information
Agency: National Aeronautics and Space Administration
Branch: N/A
Contract: N/A
Agency Tracking Number: 16971
Amount: $492,899.00
Phase: Phase II
Program: SBIR
Solicitation Topic Code: N/A
Solicitation Number: N/A
Timeline
Solicitation Year: N/A
Award Year: 1992
Award Start Date (Proposal Award Date): N/A
Award End Date (Contract End Date): N/A
Small Business Information
6305 Ivy Ln #500
Greenbelt, MD 20770
United States
DUNS: N/A
HUBZone Owned: No
Woman Owned: No
Socially and Economically Disadvantaged: No
Principal Investigator
 () -
Business Contact
Phone: () -
Research Institution
N/A
Abstract

THIS PROJECT WILL DEVELOP A SPACECRAFT SUPERCOMPUTER (SSC) FOR FUTURE NASA MISSIONS. THE SSC WOULD HAVE COMPUTATIONAL CAPABILITIES AT LEAST AN ORDER OF MAGNITUDE GREATER THAN CURRENT FLIGHT ARCHITECTURES. BY USING EXISTING OR EMERGING MICROPROCESSOR TECHNOLOGY AND A NOVEL CONNECTIVITY ARCHITECTURE, IT WOULD PROVIDE SUFFICIENT MEMORY AND COMMUNICATION BANDWIDTH RESOURCES FOR MANY SPACECRAFT AND PAYLOAD REQUIREMENTS. THE GOAL IS TO DEMONSTRATE A PROTOTYPE SSC IN A REALISTIC FLIGHT-OPERATIONS ENVIRONMENT WITH MINIMAL RISK AND COST. THIS WOULD BE BEST ACCOMPLISHEDAS A FLIGHT EXPERIMENT ON A HITCHHIKER (HHG)- CLASS MISSION. THE SSC'S FLEXIBLE ARCHITECTURE AND USE OF EXTREMELY FAST MICROPROCESSORS WOULD ENABLE IT TO HANDLE A WIDE RANGE OF COMPUTATIONAL PROBLEMS SUCH AS ONBOARD PROCESSING OF INSTRUMENT DATA, DATA COMPRESSION, AND SENSOR AND CONTROL SYSTEM MANAGEMENT. THE PHASE I EFFORT WILL ESTABLISH THE FEASIBILITY OF THE PRELIMINARY DESIGN AND WILL SELECT A PROPOSED HHG-CLASS MISSION FOR THE DEMONSTRATION. PHASE II WORK WOULD CONSIST OF COMPLETING THE DETAILED DESIGN, PROTOTYPE FABRICATION, TESTING, AND INTEGRATION. THE SSC CAN PROVIDE INCREASED COMPUTATIONAL CAPABILITY FOR FUTURE NASA PROGRAMS EMPLOYING HIGH-DATA-RATEINSTRUMENTS OR LARGE CLUSTERS OF MEDIUM-RATE INSTRUMENTS. THIS PROJECT WILL DEVELOP A SPACECRAFT SUPERCOMPUTER (SSC) FOR FUTURE NASA MISSIONS. THE SSC WOULD HAVE COMPUTATIONAL CAPABILITIES AT LEAST AN ORDER OF MAGNITUDE GREATER THAN CURRENT FLIGHT ARCHITECTURES. BY USING EXISTING OR EMERGING MICROPROCESSOR TECHNOLOGY AND A NOVEL CONNECTIVITY ARCHITECTURE, IT WOULD PROVIDE SUFFICIENT MEMORY AND COMMUNICATION BANDWIDTH RESOURCES FOR MANY SPACECRAFT AND PAYLOAD REQUIREMENTS. THE GOAL IS TO DEMONSTRATE A PROTOTYPE SSC IN A REALISTIC FLIGHT-OPERATIONS ENVIRONMENT WITH MINIMAL RISK AND COST. THIS WOULD BE BEST ACCOMPLISHEDAS A FLIGHT EXPERIMENT ON A HITCHHIKER (HHG)- CLASS MISSION. THE SSC'S FLEXIBLE ARCHITECTURE AND USE OF EXTREMELY FAST MICROPROCESSORS WOULD ENABLE IT TO HANDLE A WIDE RANGE OF COMPUTATIONAL PROBLEMS SUCH AS ONBOARD PROCESSING OF INSTRUMENT DATA, DATA COMPRESSION, AND SENSOR AND CONTROL SYSTEM MANAGEMENT. THE PHASE I EFFORT WILL ESTABLISH THE FEASIBILITY OF THE PRELIMINARY DESIGN AND WILL SELECT A PROPOSED HHG-CLASS MISSION FOR THE DEMONSTRATION. PHASE II WORK WOULD CONSIST OF COMPLETING THE DETAILED DESIGN, PROTOTYPE FABRICATION, TESTING, AND INTEGRATION. THE SSC CAN PROVIDE INCREASED COMPUTATIONAL CAPABILITY FOR FUTURE NASA PROGRAMS EMPLOYING HIGH-DATA-RATEINSTRUMENTS OR LARGE CLUSTERS OF MEDIUM-RATE INSTRUMENTS.

* Information listed above is at the time of submission. *

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