Distributed Optoelectronic Switching Modules for Highly Dynamic On-Chip and Chip-to-Chip Interconnects

Award Information
Agency:
Department of Defense
Branch
Air Force
Amount:
$99,223.00
Award Year:
2002
Program:
SBIR
Phase:
Phase I
Contract:
F29601-02-C-0070
Award Id:
57459
Agency Tracking Number:
021NM-0276
Solicitation Year:
n/a
Solicitation Topic Code:
n/a
Solicitation Number:
n/a
Small Business Information
PO Box 10779, Zephyr Cove, NV, 89448
Hubzone Owned:
N
Minority Owned:
N
Woman Owned:
N
Duns:
161162896
Principal Investigator:
Peter Guilfoyle
President/CEO
(775) 588-4176
peterg@opticomp.com
Business Contact:
Rodney Lampson
Treasurer
(775) 588-4176
rodneyl@opticomp.com
Research Institution:
n/a
Abstract
"The primary goal of the proposed Phase I SBIR effort is to develop high speed, highly dynamic chip-to-chip interconnects utilizing hybrid waveguides and GaAs based VCSEL and photodetector technology in order to relieve the chip-to-chip interconnectbottleneck. The interconnects are accomplished using a unique distributed switching architecture that is low cost, fault tolerant, redundant, format independent, and dynamically reconfigurable.This architecture and the associated hardware can be readily implemented to realize high speed, dynamic chip-to-chip interconnects for demanding computing and signal processing applications. OptiComp Corporation occupies a 7,000 square foot facility which includes a full service, backend semiconductor fabrication cleanroom and optoelectronic device integration laboratory, a optoelectronic testing area, and a MBE based growth facility. OCC's design center includes optoelectronic based modeling software for VCSELs and waveguide structures, as well as full EDA schematic capture and mask and PCB layout. These facilities support optoelectronic device modeling and design, growth, fabrication,integration, and test. The proposed program will offer a dual-use commercialization opportunity for high speed chip-to-chip interconnects because it will provide a low cost solution that is highly dynamic, redundant, fault tolerant, and format independent.This chip-to-chip interconnect scheme has significant ma

* information listed above is at the time of submission.

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