Free Space Parallel Optical Memory Interconnects
Small Business Information
4009 Miranda Ave., Palo Alto, CA, 94304
Dr. Matthew H. Derstine
AbstractThe problem addressed in this proposal is the need for a highly parallel, switchable, high data rate interconnection system suitable for interfacing optical memory systems, optical and electronic processors, and other subsystems. The novelty of our approach is as follows. First we use a free-space, parallel, optical ring network for the basic bus interconnection topology. Second, we define optical interfaces to the network that provide optical format conversion so that the data format in the subsystem can be matched to the data format on the network. Third, our interfaces are based on recent advances in design and fabrication of smart pixel optoelectronic arrays. We will explore alternative architectures, including switched interconnections, beam steering, and ring network topologies. Our system design will take advantage of emerging device and packaging technologies and will exploit Optivision's experience with other interconnection subsystems. An interconnect architecture will be selected and performance models developed. These investigations will also suggest limitations of current smart pixel, packaging and integration technologies in terms of the optical performance, power dissipation and types of functions that can be performed. An optional task will demonstrate use of two-dimensional arrays for conversion of optical data from one format to another.
* information listed above is at the time of submission.